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authorEvan Cheng <evan.cheng@apple.com>2007-12-05 03:14:33 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-12-05 03:14:33 +0000
commitbb26301864354b6bfc01212d4aa0ef695fbdc833 (patch)
tree2a038c5528298d90a23e0f9d74a1a8d2078376b5 /llvm/lib/Target/Sparc
parentd766e5d7c24b517bb8e2315dfd880dc78dedaed6 (diff)
downloadbcm5719-llvm-bb26301864354b6bfc01212d4aa0ef695fbdc833.tar.gz
bcm5719-llvm-bb26301864354b6bfc01212d4aa0ef695fbdc833.zip
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed. llvm-svn: 44600
Diffstat (limited to 'llvm/lib/Target/Sparc')
-rw-r--r--llvm/lib/Target/Sparc/SparcRegisterInfo.cpp11
-rw-r--r--llvm/lib/Target/Sparc/SparcRegisterInfo.h4
2 files changed, 8 insertions, 7 deletions
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
index fcd0dfcca25..dc2f9e89ff2 100644
--- a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -32,23 +32,24 @@ SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st,
void SparcRegisterInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned SrcReg, int FI,
+ unsigned SrcReg, bool isKill, int FI,
const TargetRegisterClass *RC) const {
// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
if (RC == SP::IntRegsRegisterClass)
BuildMI(MBB, I, TII.get(SP::STri)).addFrameIndex(FI).addImm(0)
- .addReg(SrcReg, false, false, true);
+ .addReg(SrcReg, false, false, isKill);
else if (RC == SP::FPRegsRegisterClass)
BuildMI(MBB, I, TII.get(SP::STFri)).addFrameIndex(FI).addImm(0)
- .addReg(SrcReg, false, false, true);
+ .addReg(SrcReg, false, false, isKill);
else if (RC == SP::DFPRegsRegisterClass)
BuildMI(MBB, I, TII.get(SP::STDFri)).addFrameIndex(FI).addImm(0)
- .addReg(SrcReg, false, false, true);
+ .addReg(SrcReg, false, false, isKill);
else
assert(0 && "Can't store this register to stack slot");
}
void SparcRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
+ bool isKill,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const {
@@ -71,7 +72,7 @@ void SparcRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
else
MIB.addFrameIndex(MO.getFrameIndex());
}
- MIB.addReg(SrcReg, false, false, true);
+ MIB.addReg(SrcReg, false, false, isKill);
NewMIs.push_back(MIB);
return;
}
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.h b/llvm/lib/Target/Sparc/SparcRegisterInfo.h
index 347b631ecf4..8049fadda1b 100644
--- a/llvm/lib/Target/Sparc/SparcRegisterInfo.h
+++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.h
@@ -32,10 +32,10 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo {
/// Code Generation virtual methods...
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
- unsigned SrcReg, int FrameIndex,
+ unsigned SrcReg, bool isKill, int FrameIndex,
const TargetRegisterClass *RC) const;
- void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
+ void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const;
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