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* JumpTable support! What this represents is working asm and jit support forNate Begeman2006-04-222-6/+3
| | | | | | | | x86 and ppc for 100% dense switch statements when relocations are non-PIC. This support will be extended and enhanced in the coming days to support PIC, and less dense forms of jump tables. llvm-svn: 27947
* Add the README files to the distribution.Reid Spencer2006-04-131-0/+1
| | | | llvm-svn: 27651
* Disable switch lowering for targets based on the selection dag isel,Nate Begeman2006-04-081-3/+0
| | | | | | letting the code generator handle them directly. llvm-svn: 27539
* Foundation for call frame information.Jim Laskey2006-04-072-1/+8
| | | | llvm-svn: 27491
* Expose base register for DwarfWriter. Refactor code accordingly.Jim Laskey2006-03-282-11/+4
| | | | llvm-svn: 27225
* Translate llvm target registers to dwarf register numbers properly.Jim Laskey2006-03-271-1/+1
| | | | llvm-svn: 27180
* SelectionDAGISel can now natively handle Switch instructions, in the sameNate Begeman2006-03-271-1/+9
| | | | | | | | | | | | | | manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary search tree of basic blocks. The new approach has several advantages: it is faster, it generates significantly smaller code in many cases, and it paves the way for implementing dense switch tables as a jump table by handling switches directly in the instruction selector. This functionality is currently only enabled on x86, but should be safe for every target. In anticipation of making it the default, the cfg is now properly updated in the x86, ppc, and sparc select lowering code. llvm-svn: 27156
* #include Intrinsics.h into all dag iselsChris Lattner2006-03-251-0/+1
| | | | llvm-svn: 27109
* D'oh - should be even numbered.Jim Laskey2006-03-241-15/+15
| | | | llvm-svn: 27088
* Add dwarf register numbering to register data.Jim Laskey2006-03-241-31/+80
| | | | llvm-svn: 27081
* Add support to locate local variables in frames (early version.)Jim Laskey2006-03-232-0/+15
| | | | llvm-svn: 26994
* Eliminate IntrinsicLowering from TargetMachine.Chris Lattner2006-03-232-6/+3
| | | | | | Make the CBE and V9 backends create their own, since they're the only ones that use it. llvm-svn: 26974
* Remove BRTWOWAY*Nate Begeman2006-03-171-2/+0
| | | | | | | | Make the PPC backend not dependent on BRTWOWAY_CC and make the branch selector smarter about the code it generates, fixing a case in the readme. llvm-svn: 26814
* Add support for 'special' llvm globals like debug info and static ctors/dtors.Chris Lattner2006-03-091-1/+6
| | | | llvm-svn: 26628
* Copysign needs to be expanded everywhere. Note that Alpha and IA64 shouldChris Lattner2006-03-051-0/+2
| | | | | | implement copysign as a native op if they have it. llvm-svn: 26541
* Don't print constant initializers, they may span lines now.Chris Lattner2006-02-271-2/+0
| | | | llvm-svn: 26403
* The HasNoV9 hack isn't needed here, now that tblgen knows that ↵Chris Lattner2006-02-211-3/+2
| | | | | | | | CustomDAGSchedInserter instructions are expensive. llvm-svn: 26298
* kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBCNate Begeman2006-02-172-41/+18
| | | | | | | and SUBE nodes that actually expose what's going on and allow for significant simplifications in the targets. llvm-svn: 26255
* Rework the SelectionDAG-based implementations of SimplifyDemandedBitsNate Begeman2006-02-161-13/+26
| | | | | | | and ComputeMaskedBits to match the new improved versions in instcombine. Tested against all of multisource/benchmarks on ppc. llvm-svn: 26238
* Sparc actually *DOES* have a directive for emitting zeros. In fact, it requiresChris Lattner2006-02-151-1/+1
| | | | | | | | | | | | it, because this: .bss X: .byte 0 results in the assembler warning: "initialization in bss segment". Annoying. llvm-svn: 26204
* Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.Chris Lattner2006-02-151-1/+22
| | | | | | | | The ABI specifies that there is a register save area at the bottom of the stack, which means the actual used pointer needs to be an offset from the subtracted value. llvm-svn: 26202
* Switch targets over to using SelectionDAG::getCALLSEQ_START to createChris Lattner2006-02-131-2/+1
| | | | | | CALLSEQ_START nodes. llvm-svn: 26143
* Use the auto-generated call matcher. Remove a broken impl of the ↵Chris Lattner2006-02-103-61/+34
| | | | | | | | | | frameaddr/returnaddr intrinsics. Autogen frameindex matcher llvm-svn: 26107
* Update to new-style flags usage, simplifying the .td fileChris Lattner2006-02-102-36/+25
| | | | llvm-svn: 26106
* DoneChris Lattner2006-02-091-1/+0
| | | | llvm-svn: 26091
* Enable LSR by default for SPARC: it is a clear win.Chris Lattner2006-02-091-4/+1
| | | | llvm-svn: 26090
* Match getTargetNode() changes (now return SDNode* instead of SDOperand).Evan Cheng2006-02-091-24/+29
| | | | llvm-svn: 26085
* add an option to turn on LSR.Chris Lattner2006-02-092-1/+62
| | | | llvm-svn: 26080
* Adjust to MachineConstantPool interface change: instead of keeping aChris Lattner2006-02-091-1/+1
| | | | | | value/alignment pair for each constant, keep a value/offset pair. llvm-svn: 26078
* Change Select() fromEvan Cheng2006-02-091-32/+49
| | | | | | | | SDOperand Select(SDOperand N); to void Select(SDOperand &Result, SDOperand N); llvm-svn: 26067
* Fix the Sparc backend with Evan's recent tblgen changesChris Lattner2006-02-051-7/+7
| | | | llvm-svn: 26009
* Use SelectRoot() as the entry to any tblgen based isel.Evan Cheng2006-02-051-1/+2
| | | | llvm-svn: 25998
* remove V8 referenceChris Lattner2006-02-051-1/+1
| | | | llvm-svn: 25991
* Rename SPARC V8 target to be the LLVM SPARC target.Chris Lattner2006-02-0520-0/+3682
| | | | llvm-svn: 25985
* Great renaming: Sparc --> SparcV9Brian Gaeke2004-02-2558-17669/+0
| | | | llvm-svn: 11826
* FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVarBrian Gaeke2004-02-244-3/+114
| | | | llvm-svn: 11804
* Move MOTy::UseType enum into MachineOperand. This eliminates theAlkis Evlogimenos2004-02-224-56/+64
| | | | | | | | | switch statements in the constructors and simplifies the implementation of the getUseType() member function. You will have to specify defs using MachineOperand::Def instead of MOTy::Def though (similarly for Use and UseAndDef). llvm-svn: 11715
* Adjustments to support the new ConstantAggregateZero classChris Lattner2004-02-151-2/+3
| | | | llvm-svn: 11474
* Use newly added next() and prior() utility functions.Alkis Evlogimenos2004-02-142-6/+5
| | | | llvm-svn: 11430
* Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos2004-02-138-17/+15
| | | | llvm-svn: 11393
* Squish warningChris Lattner2004-02-131-2/+2
| | | | llvm-svn: 11375
* Remove this MachineOpCodeFlags assertion - its test can never be false.Brian Gaeke2004-02-121-2/+0
| | | | llvm-svn: 11342
* Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos2004-02-1210-75/+55
| | | | | | | | | ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. llvm-svn: 11340
* MachineInstr::getOpCode() --> getOpcode() in SPARC back-end.Brian Gaeke2004-02-1110-41/+41
| | | | llvm-svn: 11335
* Increase constness.Alkis Evlogimenos2004-02-112-4/+6
| | | | llvm-svn: 11322
* Remove assert as the only integer registers on the sparc are physical.Alkis Evlogimenos2004-02-111-3/+0
| | | | llvm-svn: 11317
* Fix previous broken commit. A MachineOperand may have opType ==Alkis Evlogimenos2004-02-111-2/+4
| | | | | | | MO_VirtualRegister but if the register number is one of a physical register is it considered as a physical register. llvm-svn: 11315
* Remove assert as it is meaningless. MachineOperands can be tagged asAlkis Evlogimenos2004-02-111-2/+0
| | | | | | MO_VirtualRegister but actually be representing a physical register. llvm-svn: 11310
* Stop using this methodChris Lattner2004-02-101-1/+1
| | | | llvm-svn: 11282
* Remvoe use of MO.isVirtualRegister(), turn an assertion into an assert()Chris Lattner2004-02-101-5/+3
| | | | llvm-svn: 11280
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