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path: root/llvm/lib/Target/Sparc/SparcInstrInfo.td
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* [SPARCv9] Add support for the rdpr/wrpr instructions.Joerg Sonnenberger2015-10-041-0/+19
* [SPARC] Add mulscc.Joerg Sonnenberger2015-09-171-0/+4
* [SPARC] Recognize st/stx operations with %fsr argument too.Joerg Sonnenberger2015-09-161-0/+16
* [Sparc]: asm-only support for the ldstub instruction.Douglas Katzman2015-08-191-0/+11
* [SPARC] Enable writing to floating-point-state register.Douglas Katzman2015-08-191-0/+16
* [Sparc] Rename LoadASR and StoreASR from r245360 to *ASI, as was intended.James Y Knight2015-08-191-10/+10
* Load/store instructions for floating points with address space require SparcV9.Joerg Sonnenberger2015-08-181-19/+39
* Load/store for float registers from/to alternate space.Joerg Sonnenberger2015-08-101-6/+6
* [Sparc] Implement i64 load/store support for 32-bit sparc.James Y Knight2015-08-101-0/+18
* [Sparc] Fix disassembly of popc instruction.James Y Knight2015-08-051-2/+2
* [SPARC] Cleanup handling of the Y/ASR registers.James Y Knight2015-07-081-2/+2
* [Sparc] Add more instruction aliases.James Y Knight2015-07-061-0/+1
* [Sparc] Add support for flush instruction.James Y Knight2015-07-061-0/+14
* [Sparc] Rearrange SparcInstrInfo, no change.James Y Knight2015-07-011-68/+80
* Sparc: Support PSR, TBR, WIM read/write instructions.James Y Knight2015-05-181-0/+48
* Sparc: Add the "alternate address space" load/store instructions.James Y Knight2015-05-181-10/+41
* Add support for the Sparc implementation-defined "ASR" registers.James Y Knight2015-05-181-12/+11
* Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"Sergey Dmitrouk2015-04-281-2/+3
* Revert "[DebugInfo] Add debug locations to constant SD nodes"Daniel Jasper2015-04-281-3/+2
* [DebugInfo] Add debug locations to constant SD nodesSergey Dmitrouk2015-04-281-2/+3
* Reuse a bunch of cached subtargets and remove getSubtarget callsEric Christopher2015-01-301-9/+9
* Fix a whole bunch of binary literals which were the wrong size. All were bei...Pete Cooper2014-08-071-1/+1
* [Sparc] Add support for decoding 'swap' instruction.Venkatraman Govindaraju2014-03-091-1/+1
* [Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc back...Venkatraman Govindaraju2014-03-021-0/+12
* [Sparc] Add return/rett instruction to Sparc backend.Venkatraman Govindaraju2014-03-021-0/+8
* [Sparc] Add support for decoding jmpl/retl/ret instruction.Venkatraman Govindaraju2014-03-021-1/+2
* [Sparc] Add fcmpe* instructions to Sparc backend.Venkatraman Govindaraju2014-03-021-0/+13
* [Sparc] Add VIS instructions to sparc backend.Venkatraman Govindaraju2014-03-021-1/+7
* [SparcV9] Adds support for branch on integer register instructions (BPr) and ...Venkatraman Govindaraju2014-03-021-0/+4
* [Sparc] Add support for parsing branches and conditional move instructions wi...Venkatraman Govindaraju2014-03-021-1/+29
* [Sparc] Make floating point branch instruction formats to accept %fcc0-%fcc1 ...Venkatraman Govindaraju2014-03-021-16/+20
* [Sparc] Add support for parsing fcmp with %fcc registers.Venkatraman Govindaraju2014-03-021-1/+14
* [Sparc] Add register class for floating point conditional flags (%fcc0 - %fcc3).Venkatraman Govindaraju2014-03-021-5/+5
* [SparcV9] Add support for parsing branch instructions with prediction.Venkatraman Govindaraju2014-03-011-18/+49
* [Sparc] Add support for parsing annulled branch instructions.Venkatraman Govindaraju2014-03-011-6/+27
* [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.Venkatraman Govindaraju2014-03-011-1/+2
* [Sparc] Add missing ALU instruction patterns.Venkatraman Govindaraju2014-03-011-0/+35
* [Sparc] Add support to decode unimp instruction.Venkatraman Govindaraju2014-03-011-2/+2
* [Sparc] Add support to decode negative simm13 operands in the sparc disassemb...Venkatraman Govindaraju2014-03-011-23/+27
* [Sparc] Add support for decoding call instructions in the sparc disassembler.Venkatraman Govindaraju2014-03-011-2/+3
* [Sparc] Add support to disassemble sparc memory instructions.Venkatraman Govindaraju2014-03-011-16/+26
* SPARC: Implement TRAP lowering. Matches what GCC emits.Benjamin Kramer2014-02-231-0/+3
* [Sparc] Emit correct encoding for atomic instructions. Also, add support for ...Venkatraman Govindaraju2014-02-071-8/+8
* [SparcV9] Use correct register class (I64RegClass) to hold the address of _G...Venkatraman Govindaraju2014-01-291-1/+1
* [Sparc] Add support for parsing floating point instructions.Venkatraman Govindaraju2014-01-121-123/+123
* [Sparc] Add support for parsing jmpl instruction and make indirect call and j...Venkatraman Govindaraju2014-01-101-13/+22
* [Sparc] Multiclass for loads/stores. No functionality change intended.Venkatraman Govindaraju2014-01-091-116/+42
* [Sparc] Add support for parsing branch instructions and conditional moves.Venkatraman Govindaraju2014-01-081-4/+7
* [Sparc] Add support for parsing memory operands in sparc AsmParser.Venkatraman Govindaraju2014-01-071-2/+2
* [Sparc] Add initial implementation of disassembler for sparcVenkatraman Govindaraju2014-01-061-38/+33
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