| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Add support for -ffixed-xX flags | Simon Cook | 2019-10-22 | 1 | -0/+2 |
| * | [RISCV] Implement RISCVRegisterInfo::getPointerRegClass | Luis Marques | 2019-08-27 | 1 | -0/+6 |
| * | CodeGen: Introduce a class for registers | Matt Arsenault | 2019-06-24 | 1 | -1/+1 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [RISCV] Set isReMaterializable on ADDI and LUI instructions | Alex Bradbury | 2018-05-17 | 1 | -0/+2 |
| * | [RISCV] Implement support for the BranchRelaxation pass | Alex Bradbury | 2018-01-10 | 1 | -0/+4 |
| * | [RISCV] Support stack frames and offsets up to 32-bits | Alex Bradbury | 2018-01-10 | 1 | -0/+8 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -1/+1 |
| * | [RISCV] Initial support for function calls | Alex Bradbury | 2017-11-08 | 1 | -0/+3 |
| * | [RISCV] Codegen for conditional branches | Alex Bradbury | 2017-11-08 | 1 | -0/+2 |
| * | [RISCV] Initial codegen support for ALU operations | Alex Bradbury | 2017-10-19 | 1 | -0/+40 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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