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bcm5719-llvm
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meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
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lib
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Target
/
R600
/
SIRegisterInfo.cpp
Commit message (
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)
Author
Age
Files
Lines
*
R600/SI: Return the correct index for VGPRs in getHWRegIndex()
Tom Stellard
2014-03-31
1
-1
/
+1
*
Fix known typos
Alp Toker
2014-01-24
1
-1
/
+1
*
R600/SI: Fix moveToVALU when the first operand is VSrc.
Matt Arsenault
2013-11-18
1
-0
/
+2
*
R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs()
Tom Stellard
2013-11-15
1
-0
/
+1
*
R600/SI: Add support for private address space load/store
Tom Stellard
2013-11-13
1
-0
/
+8
*
R600/SI: Prefer SALU instructions for bit shift operations
Tom Stellard
2013-11-13
1
-6
/
+42
*
Make method static
Matt Arsenault
2013-11-10
1
-1
/
+1
*
R600/SI: Mark the EXEC register as reserved
Tom Stellard
2013-10-10
1
-0
/
+1
*
R600/SI: Choose the correct MOV instruction for copying immediates
Tom Stellard
2013-08-14
1
-0
/
+11
*
R600/SI: Add more special cases for opcodes to ensureSRegLimit()
Tom Stellard
2013-08-06
1
-0
/
+21
*
Don't cache the instruction and register info from the TargetMachine, because
Bill Wendling
2013-06-07
1
-5
/
+3
*
R600/SI: switch back to RegPressure scheduling
Christian Konig
2013-03-26
1
-0
/
+5
*
Add R600 backend
Tom Stellard
2012-12-11
1
-0
/
+48