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path: root/llvm/lib/Target/R600/SIRegisterInfo.cpp
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* R600 -> AMDGPU renameTom Stellard2015-06-131-543/+0
* R600/SI: Update tablegen defs to avoid restoring spilled sgprs to m0Tom Stellard2015-05-121-8/+0
* R600/SI: Remove M0Reg register classTom Stellard2015-05-121-1/+0
* R600/SI: Replace TRI->getRegClass(Reg) with TRI->getPhysRegClass(Reg)Tom Stellard2015-05-121-0/+1
* R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CIMarek Olsak2015-03-241-1/+16
* Remove the need to cache the subtarget in the R600 TargetRegisterInfoEric Christopher2015-03-111-9/+10
* Have getRegPressureSetLimit take a MachineFunction so that aEric Christopher2015-03-111-1/+2
* R600/SI: Limit SGPRs to 80 on Tonga and IcelandMarek Olsak2015-03-091-0/+17
* R600/SI: Fix getNumSGPRsAllowed for VIMarek Olsak2015-03-091-11/+21
* R600/SI: Consistently put soffset before the offset operand for mubuf instruc...Tom Stellard2015-02-271-1/+1
* R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2Marek Olsak2015-02-031-2/+6
* R600/SI: Handle SI_SPILL_V96_RESTORE in SIRegisterInfo::eliminateFrameIndex()Tom Stellard2015-01-301-0/+1
* R600/SI: Remove stray debug statementsTom Stellard2015-01-291-5/+1
* R600/SI: Define a schedule model and enable the generic machine schedulerTom Stellard2015-01-291-3/+52
* R600/SI: Add subtarget feature to enable VGPR spilling for all shader typesTom Stellard2015-01-201-0/+2
* R600/SI: Fix simple-loop.ll testTom Stellard2015-01-201-1/+1
* R600/SI: Use external symbols for scratch bufferTom Stellard2015-01-201-28/+6
* R600/SI: Add kill flag when copying scratch offset to a registerTom Stellard2015-01-201-1/+1
* R600/SI: Spill VGPRs to scratch space for compute shadersTom Stellard2015-01-141-62/+94
* R600/SI: Use RegisterOperands to specify which operands can accept immediatesTom Stellard2015-01-121-29/+5
* R600/SI: Remove VReg_32 register classTom Stellard2015-01-071-5/+5
* R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operandTom Stellard2014-12-191-0/+1
* R600/SI: Fix allocating flat_scr_lo / flat_scr_hiMatt Arsenault2014-11-251-0/+2
* R600/SI: Fix spilling of m0 registerTom Stellard2014-11-141-1/+9
* R600/SI: Make constant array staticMatt Arsenault2014-11-141-1/+1
* R600/SI: Add new helper isSGPRClassIDMatt Arsenault2014-09-241-7/+0
* R600/SI: Mark EXEC_LO and EXEC_HI as reservedTom Stellard2014-09-241-0/+6
* R600/SI: Fix SIRegisterInfo::getPhysRegSubReg()Tom Stellard2014-09-241-1/+10
* R600/SI: Implement VGPR register spilling for compute at -O0 v3Tom Stellard2014-09-241-1/+114
* R600/SI: Clean up checks for legality of immediate operandsTom Stellard2014-09-231-3/+21
* R600/SI: Add enums for some hard-coded valuesTom Stellard2014-09-221-0/+8
* R600/SI: Add preliminary support for flat address spaceMatt Arsenault2014-09-151-0/+23
* R600/SI: Use eliminateFrameIndex() to expand SGPR spill pseudosTom Stellard2014-08-211-9/+98
* R600/SI: Handle VCC in SIRegisterInfo::getPhysRegSubReg()Tom Stellard2014-08-211-0/+11
* R600: silence GCC warningSaleem Abdulrasool2014-07-211-0/+1
* R600/SI: Use scratch memory for large private arraysTom Stellard2014-07-211-2/+46
* R600/SI: Add verifier check for immediates in register operands.Tom Stellard2014-07-021-0/+16
* R600: Remove AMDIL instruction and register definitionsTom Stellard2014-06-131-9/+0
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-131-5/+4
* Use range forMatt Arsenault2014-05-121-4/+3
* R600/SI: Only create one instruction when spilling/restoring register v3Tom Stellard2014-05-021-0/+7
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-2/+2
* R600/SI: Return the correct index for VGPRs in getHWRegIndex()Tom Stellard2014-03-311-1/+1
* Fix known typosAlp Toker2014-01-241-1/+1
* R600/SI: Fix moveToVALU when the first operand is VSrc.Matt Arsenault2013-11-181-0/+2
* R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs()Tom Stellard2013-11-151-0/+1
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-131-0/+8
* R600/SI: Prefer SALU instructions for bit shift operationsTom Stellard2013-11-131-6/+42
* Make method staticMatt Arsenault2013-11-101-1/+1
* R600/SI: Mark the EXEC register as reservedTom Stellard2013-10-101-0/+1
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