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path: root/llvm/lib/Target/R600/SIFixControlFlowLiveIntervals.cpp
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* R600 -> AMDGPU renameTom Stellard2015-06-131-96/+0
| | | | llvm-svn: 239657
* R600/SI: add pass to mark CF live ranges as non-spillableTom Stellard2015-05-121-0/+96
Spilling can insert instructions almost anywhere, and this can mess up control flow lowering in a multitude of ways, due to instruction reordering. Let's sort this out the easy way: never spill registers involved with control flow, i.e. saved EXEC masks. Unfortunately, this does not work at all with optimizations disabled, as the register allocator ignores spill weights. This should be addressed in a future commit. The test was reduced from the "stacks" shader of [1]. Some issues trigger the machine verifier while another one is checked manually. [1] http://madebyevan.com/webgl-path-tracing/ v2: only insert pass with optimizations enabled, merge test runs. Patch by: Grigori Goronzy llvm-svn: 237152
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