| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | R600: Rework subtarget info and remove AMDILDevice classes | Tom Stellard | 2013-06-07 | 1 | -22/+22 |
| * | R600: Fix the fetch limits for R600 generation GPUs | Tom Stellard | 2013-06-07 | 1 | -16/+18 |
| * | R600/SI: Add processor type for Hainan asic | Tom Stellard | 2013-05-14 | 1 | -0/+1 |
| * | R600: Clean up comments in Processors.td | Tom Stellard | 2013-05-03 | 1 | -5/+1 |
| * | R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips | Vincent Lejeune | 2013-04-30 | 1 | -16/+16 |
| * | R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions | Vincent Lejeune | 2013-04-30 | 1 | -17/+32 |
| * | R600: Add some new processor variants | Vincent Lejeune | 2013-04-30 | 1 | -0/+2 |
| * | R600: Add RV670 processor | Tom Stellard | 2013-04-05 | 1 | -0/+1 |
| * | R600/SI: Add processor types for each SI variant | Tom Stellard | 2013-04-05 | 1 | -2/+5 |
| * | R600: Add an explicit default processor | Tom Stellard | 2013-02-07 | 1 | -0/+1 |
| * | Add R600 backend | Tom Stellard | 2012-12-11 | 1 | -0/+29 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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