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path: root/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
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* Factor MI-Sched in preparation for post-ra scheduling support.Andrew Trick2013-12-281-1/+1
* Small simplification, p0 is the same as p.Rafael Espindola2013-12-191-1/+1
* R600/SI: Make private pointers be 32-bit.Matt Arsenault2013-12-191-6/+5
* One last cleanup of LLVM's DataLayout strings.Rafael Espindola2013-12-161-2/+4
* Structure R600's computeDataLayout more like every other target.Rafael Espindola2013-12-161-8/+5
* The preferred alignment defaults to the abi alignment. Omit if it is the same.Rafael Espindola2013-12-161-3/+3
* Don't duplicate the DataLayout defaults for integer, floats and vectors.Rafael Espindola2013-12-161-6/+1
* On DataLayout, omit the default of p:64:64:64.Rafael Espindola2013-12-161-3/+1
* Turn AMDGPUSubtarget::getDataLayout into a static function.Rafael Espindola2013-12-141-1/+24
* R600: Register AMDGPUCFGStructurizer passTom Stellard2013-12-111-1/+1
* R600: Register R600EmitClauseMarkers passTom Stellard2013-12-111-1/+1
* Add a RequireStructuredCFG Field to TargetMachine.Vincent Lejeune2013-12-071-0/+1
* R600: Enable the IR structurizer by defaultTom Stellard2013-11-181-2/+1
* R600: Add a SubtargetFeatture for disabling the ifcvt pass.Tom Stellard2013-11-181-1/+2
* R600: Fix handling of vector kernel argumentsTom Stellard2013-10-231-2/+3
* R600: Simplify handling of private address spaceTom Stellard2013-10-221-6/+0
* R600/SI: Add SinkingPass before ISelVincent Lejeune2013-10-131-0/+1
* R600: Use StructurizeCFGPass for non SI targetsTom Stellard2013-10-101-1/+4
* R600: add a pass that merges clauses.Vincent Lejeune2013-10-011-2/+3
* Allow subtarget selection of the default MachineScheduler and document the in...Andrew Trick2013-09-201-8/+10
* R600/SI: Convert v16i8 resource descriptors to i128Tom Stellard2013-08-141-0/+1
* R600/SI: Use VSrc_* register classes as the default classes for typesTom Stellard2013-08-061-0/+2
* Factor FlattenCFG out from SimplifyCFGTom Stellard2013-08-061-1/+1
* SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch cond...Tom Stellard2013-07-271-0/+12
* R600: Simplify AMDILCFGStructurize by removing templates and assuming single ...Vincent Lejeune2013-07-191-1/+0
* R600: Do not predicated basic block with multiple alu clauseVincent Lejeune2013-07-091-1/+4
* Move StructurizeCFG out of R600 to generic Transforms.Matt Arsenault2013-06-191-1/+1
* R600: Rework subtarget info and remove AMDILDevice classesTom Stellard2013-06-071-10/+10
* R600: Add a pass that merge Vector RegisterVincent Lejeune2013-06-051-0/+5
* Revert "R600: Add a pass that merge Vector Register"Rafael Espindola2013-06-051-5/+0
* R600: Add a pass that merge Vector RegisterVincent Lejeune2013-06-041-0/+5
* Fix a leak on the r600 backend.Rafael Espindola2013-05-231-4/+4
* R600: Improve texture handlingVincent Lejeune2013-05-171-0/+2
* Remove the MachineMove class.Rafael Espindola2013-05-131-0/+1
* R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen ...Tom Stellard2013-05-101-1/+0
* R600: Packetize instructionsVincent Lejeune2013-04-301-1/+2
* R600: Add support for native control flowVincent Lejeune2013-04-011-0/+1
* R600: Emit CF_ALU and use true kcache register.Vincent Lejeune2013-04-011-0/+1
* R600/SI: rework input interpolation v2Christian Konig2013-03-071-5/+0
* R600: initial scheduler codeVincent Lejeune2013-03-051-1/+16
* R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.Vincent Lejeune2013-03-051-1/+0
* R600/SI: cleanup literal handling v3Christian Konig2013-02-161-1/+0
* R600: Support for indirect addressing v4Tom Stellard2013-02-061-0/+6
* R600: Fold remaining CONST_COPY after expand pseudo instTom Stellard2013-02-051-1/+1
* R600: rework handling of the constantsTom Stellard2013-01-231-0/+1
* R600: Proper insert S_WAITCNT instructionsTom Stellard2013-01-181-0/+5
* R600: New control flow for SI v2Tom Stellard2012-12-191-6/+7
* Add R600 backendTom Stellard2012-12-111-0/+141
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