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* R600 -> AMDGPU renameTom Stellard2015-06-131-282/+0
| | | | llvm-svn: 239657
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and ↵Daniel Sanders2015-06-101-3/+4
| | | | | | | | | | | | | | | | | | create*MCSubtargetInfo(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rafael Reviewed By: rafael Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10311 llvm-svn: 239467
* R600: Re-enable sub-reg livenessTom Stellard2015-06-041-1/+1
| | | | | | The bug in the R600 backend that this uncovered has been fixed. llvm-svn: 238999
* R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chipsTom Stellard2015-05-251-0/+5
| | | | | | The src and dst register cannot be the same on chips with 16 lds banks. llvm-svn: 238147
* Reinstate revisions r234755, r234759, r234760Jan Vesely2015-04-301-0/+8
| | | | | | | | | changes: Don't apply on hexagon and NVPTX since they no longer claim to support UADDO/USUBO Add location to getConstant Drop comment about the ops being turned into expand llvm-svn: 236240
* R600/SI: Add assembler support for all CI and VI VOP1 instructionsTom Stellard2015-04-231-0/+2
| | | | llvm-svn: 235629
* Revert revisions r234755, r234759, r234760Jan Vesely2015-04-131-8/+0
| | | | | | | | | | | Revert "Remove default in fully-covered switch (to fix Clang -Werror -Wcovered-switch-default)" Revert "R600: Add carry and borrow instructions. Use them to implement UADDO/USUBO" Revert "LegalizeDAG: Try to use Overflow operations when expanding ADD/SUB" Using overflow operations fails CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll on hexagon, nvptx, and r600. Revert while I investigate. llvm-svn: 234768
* R600: Add carry and borrow instructions. Use them to implement UADDO/USUBOJan Vesely2015-04-131-0/+8
| | | | | | | | | | | | | | | | v2: tighten the sub64 tests v3: rename to CARRY/BORROW v4: fixup test cmdline add known bits computation use sign extend instead of sub 0,x better add test v5: remove redundant break move lowering to separate functions fix comments Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewers: arsenm llvm-svn: 234759
* R600/SI: Initial support for assembler and inline assemblyTom Stellard2015-04-081-0/+3
| | | | | | | | | | | | | This is currently considered experimental, but most of the more commonly used instructions should work. So far only SI has been extensively tested, CI and VI probably work too, but may be buggy. The current set of tests cases do not give complete coverage, but I think it is sufficient for an experimental assembler. See the documentation in R600Usage for more information. llvm-svn: 234381
* R600/SI: Limit SGPRs to 80 on Tonga and IcelandMarek Olsak2015-03-091-0/+9
| | | | | | This is a candidate for stable. llvm-svn: 231659
* R600/SI: Disable subreg livenessTom Stellard2015-02-111-1/+1
| | | | | | This is temporary while we try to fix a crash in the register coalescer. llvm-svn: 228861
* R600/SI: Enable subreg liveness by defaultTom Stellard2015-02-041-0/+4
| | | | llvm-svn: 228228
* R600/SI: Add subtarget feature for if f32 fma is fastMatt Arsenault2015-01-291-0/+5
| | | | llvm-svn: 227483
* R600/SI: Define a schedule model and enable the generic machine schedulerTom Stellard2015-01-291-1/+13
| | | | | | The schedule model is not complete yet, and could be improved. llvm-svn: 227461
* R600: Move DataLayout to AMDGPUTargetMachineTom Stellard2015-01-281-6/+0
| | | | | | | | This is a follow up to r227113. It is now required to use the amdgcn target for SI and newer GPUs. llvm-svn: 227316
* R600: Use a Southern Islands GPU as the default for the amdgcn targetTom Stellard2015-01-281-1/+2
| | | | llvm-svn: 227314
* Move DataLayout back to the TargetMachine from TargetSubtargetInfoEric Christopher2015-01-261-2/+5
| | | | | | | | | | | | | | | | | | | derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. llvm-svn: 227113
* R600/SI: Add subtarget feature to enable VGPR spilling for all shader typesTom Stellard2015-01-201-0/+4
| | | | | | | This is disabled by default, but can be enabled with the subtarget feature: 'vgpr-spilling' llvm-svn: 226597
* [cleanup] Re-sort all the #include lines in LLVM usingChandler Carruth2015-01-141-1/+1
| | | | | | | | | | | utils/sort_includes.py. I clearly haven't done this in a while, so more changed than usual. This even uncovered a missing include from the InstrProf library that I've added. No functionality changed here, just mechanical cleanup of the include order. llvm-svn: 225974
* R600/SI: Add VI instructionsMarek Olsak2014-12-071-1/+2
| | | | llvm-svn: 223603
* R600/SI: Emit amd_kernel_code_t header for AMDGPU environmentTom Stellard2014-12-021-0/+2
| | | | llvm-svn: 223160
* R600/SI: Set the ATC bit on all resource descriptors for the HSA runtimeTom Stellard2014-12-021-0/+4
| | | | llvm-svn: 223125
* R600: Remove unused defineMatt Arsenault2014-11-071-2/+0
| | | | llvm-svn: 221543
* R600/SI: Add load / store machine optimizer pass.Matt Arsenault2014-10-101-0/+5
| | | | | | | | | | | | | Currently this only functions to match simple cases where ds_read2_* / ds_write2_* instructions can be used. In the future it might match some of the other weird load patterns, such as direct to LDS loads. Currently enabled only with a subtarget feature to enable easier testing. llvm-svn: 219533
* R600/SI: Add preliminary support for flat address spaceMatt Arsenault2014-09-151-0/+5
| | | | llvm-svn: 217777
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-3/+3
| | | | | | | | | | Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-6/+14
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Move the R600 intrinsic support back to the target machine - there'sEric Christopher2014-08-041-2/+0
| | | | | | | nothing subtarget dependent about the intrinsic support in any backend as far as I can tell. llvm-svn: 214738
* Move R600 subtarget dependent variables onto the subtarget.Eric Christopher2014-07-251-11/+22
| | | | | | No functional change. llvm-svn: 213982
* R600: Implement TTI:getPopcntSupportMatt Arsenault2014-07-181-2/+4
| | | | | | | The test is just copied from X86, and I don't know of a better way to test it. llvm-svn: 213351
* R600: Implement zero undef variants of ctlz/cttzJan Vesely2014-07-151-0/+8
| | | | | | | | | v2: use ffbh/l if available v3: Rebase on top of Matt's SI patches Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <tom@stellard.net> llvm-svn: 213072
* R600: Add denormal handling subtarget features.Matt Arsenault2014-07-141-0/+10
| | | | llvm-svn: 213018
* R600: Add option to disable promote allocaMatt Arsenault2014-07-131-1/+6
| | | | | | | This can make writing some tests harder, so add a flag to disable it. llvm-svn: 212893
* R600: Move trivial getters into header, use initializer listMatt Arsenault2014-06-271-17/+63
| | | | llvm-svn: 211917
* R600: Trivial subtarget feature cleanups.Matt Arsenault2014-06-201-1/+0
| | | | | | | Remove an unused AMDIL leftover, correct extra periods appearing in the help menu. llvm-svn: 211341
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-171-0/+2
| | | | llvm-svn: 211110
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-131-0/+7
| | | | llvm-svn: 210869
* R600: Use BCNT_INT for evergreenMatt Arsenault2014-06-101-0/+8
| | | | llvm-svn: 210569
* R600: Handle fcopysignMatt Arsenault2014-06-101-0/+4
| | | | llvm-svn: 210564
* R600: Remove unused function AMDGPUSubtarget::getDefaultSize()Tom Stellard2014-04-301-2/+0
| | | | llvm-svn: 207654
* De-virtualize or remove some methods that have no overrides nor override ↵Craig Topper2014-04-301-1/+1
| | | | | | anything. In some cases remove all together if there are no callers either. llvm-svn: 207610
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-3/+3
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition llvm-svn: 207503
* R600: Match 24-bit arithmetic patterns in a Target DAGCombineTom Stellard2014-04-071-0/+9
| | | | | | | | | | | | | | | | | Moving these patterns from TableGen files to PerformDAGCombine() should allow us to generate better code by eliminating unnecessary shifts and extensions earlier. This also fixes a bug where the MAD pattern was calling SimplifyDemandedBits with a 24-bit mask on the first operand even when the full pattern wasn't being matched. This occasionally resulted in some instructions being incorrectly deleted from the program. v2: - Fix bug with 64-bit mul llvm-svn: 205731
* R600: Match sign_extend_inreg to BFE instructionsMatt Arsenault2014-03-171-0/+9
| | | | llvm-svn: 204072
* R600: Recommit 199842: Add work-around for the CF stack entry HW bugTom Stellard2014-01-231-0/+2
| | | | | | | | | | | | | | | | | | The unit test is now disabled on non-asserts builds. The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE, CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of sub-entries on the stack is greater than or equal to the stack entry size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is present when number of sub-entries module 8 is either 7 or 0) We choose to be conservative and always apply the work-around when the number of sub-enries is greater than or equal to the stack entry size, so that we can safely over-allocate the stack when we are unsure of the stack allocation rules. reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199905
* Revert "R600: Add work-around for the CF stack entry HW bug"Tom Stellard2014-01-221-2/+0
| | | | | | | | | This reverts commit 35b8331cad6eb512a2506adbc394201181da94ba. The -debug-only flag for llc doesn't appear to be available in all build configurations. llvm-svn: 199845
* R600: Add work-around for the CF stack entry HW bugTom Stellard2014-01-221-0/+2
| | | | | | | | | | | | | | | | The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE, CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of sub-entries on the stack is greater than or equal to the stack entry size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is present when number of sub-entries module 8 is either 7 or 0) We choose to be conservative and always apply the work-around when the number of sub-enries is greater than or equal to the stack entry size, so that we can safely over-allocate the stack when we are unsure of the stack allocation rules. reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199842
* R600: Refactor stack size calculationTom Stellard2014-01-221-0/+1
| | | | | reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199840
* R600: Add wavefront size property to the subtargets v2Tom Stellard2014-01-221-0/+2
| | | | | | | | v2: - Initialize wavefront size to 0 reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199838
* Turn AMDGPUSubtarget::getDataLayout into a static function.Rafael Espindola2013-12-141-1/+0
| | | | | | No functionality change. llvm-svn: 197310
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