summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
Commit message (Expand)AuthorAgeFilesLines
...
* This patch changes the ownership of TLOF from TargetLoweringBase to TargetMac...Aditya Nandakumar2014-11-131-1/+1
* Add minnum / maxnum codegenMatt Arsenault2014-10-211-0/+2
* R600/SI: Add missing parameter to div_fmas intrinsicMatt Arsenault2014-10-211-0/+2
* R600: Fix nonsensical implementation of computeKnownBits for BFEMatt Arsenault2014-10-161-5/+1
* R600: Remove dead functionMatt Arsenault2014-10-161-12/+0
* R600: Remove unnecessary part of computeKnownBitsForTargetNodeMatt Arsenault2014-10-151-5/+0
* Move variable down to useMatt Arsenault2014-10-151-4/+4
* R600: Fix miscompiles when BFE has multiple usesMatt Arsenault2014-10-151-7/+10
* R600: Use existing variableMatt Arsenault2014-10-151-1/+1
* R600: Remove outdated commentMatt Arsenault2014-10-151-3/+0
* R600/SI: Custom lower f64 -> i64 conversionsMatt Arsenault2014-10-031-0/+53
* R600: Custom lower [s|u]int_to_fp for i64 -> f64Matt Arsenault2014-10-031-2/+43
* R600/SI: Fix ftrunc f64 conformance failures.Matt Arsenault2014-10-031-1/+1
* R600/SI: Add a note about the order of the operands to div_scaleMatt Arsenault2014-09-261-0/+6
* R600: Don't set BypassSlowDiv for 64-bit divisionTom Stellard2014-09-221-3/+0
* R600/SI: Use ISD::MUL instead of ISD::UMULO when lowering divisionTom Stellard2014-09-221-3/+3
* R600: Better fix for bug 20982Matt Arsenault2014-09-191-6/+3
* R600: Bug 20982 - Avoid undefined left shift of negative valueMatt Arsenault2014-09-181-3/+10
* R600: Custom lower fremMatt Arsenault2014-09-101-0/+19
* R600/SI: Use mad for fsub + fmulMatt Arsenault2014-08-291-0/+1
* name change: isPow2DivCheap -> isPow2SDivCheapSanjay Patel2014-08-211-1/+1
* R600/SI: Use source modifiers for f64 fnegMatt Arsenault2014-08-151-1/+1
* R600/SI: Use source modifier for f64 fabsMatt Arsenault2014-08-151-1/+1
* R600/SI: Add intrinsic for ldexpMatt Arsenault2014-08-151-0/+5
* R600: Use optimized 24bit path in udivremJan Vesely2014-08-121-17/+38
* R600: Remove unused code.Jan Vesely2014-08-121-168/+0
* R600: Use i24 optimized path for SREMJan Vesely2014-08-121-7/+27
* R600: Disable FP exceptions.Matt Arsenault2014-08-091-0/+5
* R600/SI: Avoid generating REGISTER_LOAD instructions.Tom Stellard2014-08-051-1/+2
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-4/+4
* Use the known address space constant rather than checking itMatt Arsenault2014-08-041-1/+1
* Revert "R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp"Tom Stellard2014-08-011-1/+37
* R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cppTom Stellard2014-08-011-37/+1
* Make sure no loads resulting from load->switch DAGCombine are marked invariantLouis Gerbarg2014-07-311-3/+3
* [SDAG] Enable the new assert for out-of-range result numbers inChandler Carruth2014-07-251-2/+2
* R600: Add new functions for splitting vector loads and stores.Matt Arsenault2014-07-241-20/+129
* R600: Fix LowerSDIV24Matt Arsenault2014-07-241-51/+50
* R600/SI: Store constant initializer data in constant memoryTom Stellard2014-07-211-16/+1
* R600: support fpext/fptrunc operations to and from f16.Tim Northover2014-07-181-0/+4
* R600: support f16 -> f64 conversion intrinsic.Tim Northover2014-07-181-0/+2
* R600: Implement zero undef variants of ctlz/cttzJan Vesely2014-07-151-0/+6
* R600: Add dag combine for copy of an illegal type.Matt Arsenault2014-07-151-1/+55
* R600: Implement float to long/ulongJan Vesely2014-07-101-1/+0
* R600: Fix mishandling of load / store chains.Matt Arsenault2014-07-071-11/+49
* R600: Add a comment that llvm.AMDGPU.trunc is a legacy intrinsicTom Stellard2014-07-021-1/+1
* R600: Promote i64 loads to v2i32Tom Stellard2014-07-021-0/+3
* R600: Fix crashes when an illegal type load or store is not handled.Matt Arsenault2014-07-021-2/+6
* R600: Move mul combine to separate functionMatt Arsenault2014-06-301-28/+33
* R600: Move load/store ReplaceNodeResults to common code.Matt Arsenault2014-06-271-0/+14
* Silencing a warning about isZExtFree hiding an inherited virtual function. No...Aaron Ballman2014-06-261-0/+4
OpenPOWER on IntegriCloud