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path: root/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
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* R600/SI: Set the ATC bit on all resource descriptors for the HSA runtimeTom Stellard2014-12-021-1/+3
* R600/SI: Get rid of FCLAMP_SI pseudoMatt Arsenault2014-11-131-0/+12
* R600/SI: Move all rsrc building functions to SIISelLoweringMatt Arsenault2014-11-051-50/+9
* R600/SI: Remove SI_ADDR64_RSRCMatt Arsenault2014-11-051-7/+6
* R600/SI: Remove SI_BUFFER_RSRC pseudoMatt Arsenault2014-10-171-6/+23
* R600/SI: Fix bug where immediates were being used in DS addr operandsTom Stellard2014-10-151-1/+4
* R600/SI: Also try to use 0 base for misaligned 8-byte DS loads.Matt Arsenault2014-10-151-0/+17
* R600/SI: Use DS offsets for constant addressesMatt Arsenault2014-10-141-0/+12
* R600/SI: Legalize CopyToReg during instruction selectionTom Stellard2014-10-091-0/+7
* R600/SI: Update VOP3b to not include obsolete operandsMatt Arsenault2014-09-301-8/+9
* R600/SI: Add support for global atomic addTom Stellard2014-09-251-0/+21
* R600/SI: Enable selecting SALU inside branchesTom Stellard2014-09-241-18/+0
* Revert "R600/SI: Add support for global atomic add"Tom Stellard2014-09-221-21/+0
* R600/SI: Add support for global atomic addTom Stellard2014-09-221-0/+21
* R600/SI: Add preliminary support for flat address spaceMatt Arsenault2014-09-151-1/+75
* R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operationsTom Stellard2014-09-051-1/+1
* R600/SI: Use READ2/WRITE2 instructions for 64-bit mem ops with 32-bit alignmentTom Stellard2014-08-221-0/+27
* R600/SI: Use a ComplexPattern for DS loads and storesTom Stellard2014-08-221-0/+38
* R600/SI: Make sure SCRATCH_WAVE_OFFSET is added as Live-In to the functionTom Stellard2014-08-211-2/+7
* R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variantTom Stellard2014-08-111-49/+98
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-2/+2
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-9/+13
* R600/SI: Do abs/neg folding with ComplexPatternsTom Stellard2014-08-011-0/+35
* R600/SI: Use scratch memory for large private arraysTom Stellard2014-07-211-2/+105
* R600/SI: Use a ComplexPattern for MUBUF storesTom Stellard2014-06-241-0/+53
* R600/SI: Fix div_scale intrinsic.Matt Arsenault2014-06-231-0/+28
* R600/SI: Handle i64 sub.Matt Arsenault2014-06-231-12/+21
* R600/SI: Move selection of i64 add to separate function.Matt Arsenault2014-06-231-39/+43
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-171-1/+7
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-131-0/+1
* R600/SI: Fix selection failure on scalar_to_vectorMatt Arsenault2014-06-111-5/+21
* R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0Tom Stellard2014-05-151-5/+6
* R600/SI: Only select SALU instructions in the entry or exit blockTom Stellard2014-04-291-0/+15
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-291-3/+3
* Convert SelectionDAG::SelectNodeTo to use ArrayRef.Craig Topper2014-04-271-3/+3
* R600: Minor cleanups.Matt Arsenault2014-04-181-55/+50
* R600/SI: Try to use scalar BFE.Matt Arsenault2014-04-181-5/+43
* R600/SI: Use SReg_64 instead of VSrc_64 when selecting BUILD_PAIRTom Stellard2014-04-181-1/+1
* Break PseudoSourceValue out of the Value hierarchy. It is now the root of its...Nick Lewycky2014-04-151-22/+35
* R600: Match 24-bit arithmetic patterns in a Target DAGCombineTom Stellard2014-04-071-46/+0
* R600: Replace dyn_cast + assert with castTom Stellard2014-04-071-2/+1
* R600/SI: Lower 64-bit immediates using REG_SEQUENCETom Stellard2014-04-031-0/+38
* [Modules] Move ValueMap to the IR library. While this class does notChandler Carruth2014-03-041-1/+1
* R600/SI: Custom select 64-bit ADDTom Stellard2014-02-251-0/+48
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-131-0/+34
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-0/+1
* R600: Move clamp handling code to R600IselLowering.cppVincent Lejeune2013-09-121-33/+1
* R600: Move code handling literal folding into R600ISelLowering.Vincent Lejeune2013-09-121-105/+0
* R600: Move fabs/fneg/sel folding logic into PostProcessIselVincent Lejeune2013-09-121-245/+17
* Mark an unreachable code path with llvm_unreachable. Pacifies GCC.Benjamin Kramer2013-08-311-0/+1
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