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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-12-02 17:05:41 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-12-02 17:05:41 +0000 |
| commit | 794c8c0f783eb95a43f0fca5d1d75b60eb4d237c (patch) | |
| tree | 45ab54274b7f959ed5f79d8f853db44f943f12eb /llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp | |
| parent | 4082a6c2ec2c27414c65852bc175036f440f10f5 (diff) | |
| download | bcm5719-llvm-794c8c0f783eb95a43f0fca5d1d75b60eb4d237c.tar.gz bcm5719-llvm-794c8c0f783eb95a43f0fca5d1d75b60eb4d237c.zip | |
R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime
llvm-svn: 223125
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp index 90b66725c17..ad5a5417ee3 100644 --- a/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp @@ -1012,6 +1012,8 @@ bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &GLC, SDValue &SLC, SDValue &TFE) const { SDValue Ptr, VAddr, Offen, Idxen, Addr64; + const SIInstrInfo *TII = + static_cast<const SIInstrInfo *>(Subtarget.getInstrInfo()); SelectMUBUF(Addr, Ptr, VAddr, SOffset, Offset, Offen, Idxen, Addr64, GLC, SLC, TFE); @@ -1019,7 +1021,7 @@ bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, if (!cast<ConstantSDNode>(Offen)->getSExtValue() && !cast<ConstantSDNode>(Idxen)->getSExtValue() && !cast<ConstantSDNode>(Addr64)->getSExtValue()) { - uint64_t Rsrc = AMDGPU::RSRC_DATA_FORMAT | + uint64_t Rsrc = TII->getDefaultRsrcDataFormat() | APInt::getAllOnesValue(32).getZExtValue(); // Size SDLoc DL(Addr); |
