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path: root/llvm/lib/Target/R600/AMDGPUCallingConv.td
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* R600 -> AMDGPU renameTom Stellard2015-06-131-82/+0
| | | | llvm-svn: 239657
* Remove the target machine from CCState. Previously it was only usedEric Christopher2014-08-061-12/+20
| | | | | | | | | to get the subtarget and that's accessible from the MachineFunction now. This helps clear the way for smaller changes where we getting a subtarget will require passing in a MachineFunction/Function as well. llvm-svn: 214988
* R600: Make ShaderType privateMatt Arsenault2014-07-131-2/+2
| | | | llvm-svn: 212896
* R600/SI: allow 5 more input SGPRs to a shaderMarek Olsak2014-05-051-1/+1
| | | | | | | Our OpenGL driver needs 22 SGPRs (16 user SGPRs + 6 streamout non-user SGPRs). Signed-off-by: Marek Olšák <marek.olsak@amd.com> llvm-svn: 207990
* R600: Use function inputs to represent data stored in gprVincent Lejeune2013-11-111-1/+14
| | | | llvm-svn: 194425
* R600/SI: Add compute support for CI v2Tom Stellard2013-10-291-2/+2
| | | | | | | | v2: - Fix LDS size calculation Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 193621
* R600: Fix handling of vector kernel argumentsTom Stellard2013-10-231-5/+1
| | | | | | | | | | The SelectionDAGBuilder was promoting vector kernel arguments to legal types, but this won't work for R600 and SI since kernel arguments are stored in memory and can't be promoted. In order to handle vector arguments correctly we need to look at the original types from the LLVM IR function. llvm-svn: 193215
* R600/SI: Support byval argumentsVincent Lejeune2013-10-131-1/+6
| | | | llvm-svn: 192555
* R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedbackTom Stellard2013-09-121-1/+2
| | | | | | | | | | | | | For _XYZ, the type of VDATA is v4i32, because v3i32 doesn't exist. The ADDR64 bit is not exposed. A simpler intrinsic that doesn't take a resource descriptor might be nicer. The maximum number of input SGPRs is bumped to 17. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 190575
* R600/SI: Fix an obvious typoTom Stellard2013-08-141-1/+1
| | | | | | | Patch by: Marek Olšák Signed-off-by: Marek Olšák <marek.olsak@amd.com> llvm-svn: 188419
* R600: Add 64-bit float load/store supportTom Stellard2013-08-011-5/+5
| | | | | | | | | | | | | | | | | * Added R600_Reg64 class * Added T#Index#.XY registers definition * Added v2i32 register reads from parameter and global space * Added f32 and i32 elements extraction from v2f32 and v2i32 * Added v2i32 -> v2f32 conversions Tom Stellard: - Mark vec2 operations as expand. The addition of a vec2 register class made them all legal. Patch by: Dmitry Cherkassov Signed-off-by: Dmitry Cherkassov <dcherkassov@gmail.com> llvm-svn: 187582
* R600: Use 64-bit alignment for 64-bit kernel argumentsTom Stellard2013-08-011-1/+1
| | | | llvm-svn: 187581
* R600: Use the same compute kernel calling convention for all GPUsTom Stellard2013-07-231-5/+11
| | | | | | | | A side-effect of this is that now the compiler expects kernel arguments to be 4-byte aligned. Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186916
* R600/SI: Add support for f64 kernel argumentsTom Stellard2013-07-121-1/+1
| | | | | | | Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186182
* R600/SI: Add support for v4i32 and v4f32 kernel argsTom Stellard2013-06-251-4/+5
| | | | | Tested-By: Aaron Watry <awatry@gmail.com> llvm-svn: 184820
* R600: Rework subtarget info and remove AMDILDevice classesTom Stellard2013-06-071-2/+2
| | | | | | | | This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> llvm-svn: 183566
* R600/SI: Add a calling convention for compute shadersTom Stellard2013-06-031-7/+11
| | | | llvm-svn: 183137
* R600/SI: Add support for buffer stores v2Tom Stellard2013-04-051-1/+7
| | | | | | | | v2: - Use the ADDR64 bit Reviewed-by: Christian König <christian.koenig@amd.com> llvm-svn: 178931
* R600/SI: add proper formal parameter handling for SIChristian Konig2013-03-071-0/+42
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 176623
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