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* Honor cpu directive, take two.Jim Laskey2006-12-121-0/+22
| | | | llvm-svn: 32492
* Another step forward in PPC64 JIT support: we now no-longer need stubsChris Lattner2006-12-111-2/+16
| | | | | | | | | | emitted for external globals in PPC64-JIT-PIC mode (which is good because we didn't handle them before!). This also fixes a bug handling the picbase delta, which we would get wrong in some cases. llvm-svn: 32451
* getInstrItineraryData shouldn't copy the itinerariesChris Lattner2006-12-111-1/+1
| | | | llvm-svn: 32448
* Remove what little AIX support we have. It has never been tested and isn'tChris Lattner2006-07-151-2/+0
| | | | | | complete. llvm-svn: 29156
* Document the subtarget features better, make sure that 64-bit mode, 64-bitChris Lattner2006-06-161-6/+21
| | | | | | | | | | support, and 64-bit register use are all consistent with each other. Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this to configure TargetData differently. This not makes ppc64 blow up on lots of stuff :) llvm-svn: 28825
* Rename some subtarget features. A CPU now can *have* 64-bit instructions,Chris Lattner2006-06-161-4/+4
| | | | | | can in 32-bit mode we can choose to optionally *use* 64-bit registers. llvm-svn: 28824
* First baby step towards ppc64 support. This adds a new -march=ppc64 backendChris Lattner2006-06-161-1/+5
| | | | | | that is currently just like ppc32 :) llvm-svn: 28813
* Add a subtarget feature for the stfiwx instruction. I know the G5 has it,Chris Lattner2006-02-281-0/+2
| | | | | | | but I don't know what other PPC impls do. If someone could update the proc table, I would appreciate it :) llvm-svn: 26421
* Allow itineraries to be passed through the Target Machine.Jim Laskey2005-11-011-0/+9
| | | | llvm-svn: 24139
* Typo made worse x 2 - take 2.Jim Laskey2005-10-261-1/+1
| | | | llvm-svn: 24018
* Typo x 2Jim Laskey2005-10-261-1/+1
| | | | llvm-svn: 24016
* Give full control of subtarget features over to table generated code.Jim Laskey2005-10-261-1/+7
| | | | llvm-svn: 24013
* Do the right thing and enable 64 bit regs under the control of a subtargetNate Begeman2005-10-181-0/+2
| | | | | | | option. Currently the only way to enable this is to specify the 64bitregs mattr flag. It is never enabled by default on any config yet. llvm-svn: 23779
* More PPC32 -> PPC changes, as well as merging some classes that wereNate Begeman2005-10-161-1/+1
| | | | | | redundant after the change. llvm-svn: 23759
* copy and paste errorAndrew Lenharth2005-09-291-1/+1
| | | | llvm-svn: 23528
* Add accessor for 64bit flag, so that we can tell when it is safe toNate Begeman2005-09-061-1/+2
| | | | | | generate the fun in-register fp<->long instructions. llvm-svn: 23244
* Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.Chris Lattner2005-09-021-0/+3
| | | | | | Remove the -enable-gpopt option which is subsumed by feature flags. llvm-svn: 23218
* 1. Use SubtargetFeatures in llc/lli.Jim Laskey2005-09-011-1/+3
| | | | | | | | 2. Propagate feature "string" to all targets. 3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget. llvm-svn: 23192
* Consolidate the GPOpt stuff to all use the Subtarget, instead of stillChris Lattner2005-08-051-7/+9
| | | | | | | | depending on the command line option. Now the command line option just sets the subtarget as appropriate. G5 opts will now default to on on G5-enabled nightly testers among other machines. llvm-svn: 22688
* Add Subtarget support to PowerPC. Next up, using it.Nate Begeman2005-08-041-0/+48
llvm-svn: 22644
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