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* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+1
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* EnablePPC64RS and EnablePPC32RS are used in multiple files, so theyDan Gohman2010-04-151-3/+7
| | | | | | can't be static. llvm-svn: 101377
* Fix a bunch of namespace polution.Dan Gohman2010-04-151-8/+8
| | | | llvm-svn: 101376
* remove the MMI pointer from MachineFrameInfo.Chris Lattner2010-04-051-5/+5
| | | | llvm-svn: 100415
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-2/+2
| | | | llvm-svn: 100214
* Make isInt?? and isUint?? template specializations of the generic versions. ThisBenjamin Kramer2010-03-291-14/+16
| | | | | | | makes calls a little bit more consistent and allows easy removal of the specializations in the future. Convert all callers to the templated functions. llvm-svn: 99838
* get MMI out of the label uniquing business, just go to MCContextChris Lattner2010-03-141-2/+2
| | | | | | to get unique assembler temporary labels. llvm-svn: 98489
* Now that DBG_LABEL is updated, we can finally make MachineMove Chris Lattner2010-03-141-15/+13
| | | | | | contain an MCSymbol instead of a label index. llvm-svn: 98482
* change the DBG_LABEL MachineInstr to always be createdChris Lattner2010-03-141-2/+4
| | | | | | with an MCSymbol instead of an immediate. llvm-svn: 98481
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-1/+1
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* This should have gone in with 26015, see comments there.Dale Johannesen2010-02-121-0/+12
| | | | llvm-svn: 96020
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-2/+2
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflectDan Gohman2010-02-081-6/+6
| | | | | | its current purpose. llvm-svn: 95564
* Do not store R31 into the caller's link area on PPC.Dale Johannesen2009-11-241-2/+1
| | | | | | | | | | | | This violates the ABI (that area is "reserved"), and while it is safe if all code is generated with current compilers, there is some very old code around that uses that slot for something else, and breaks if it is stored into. Adjust testcases looking for current behavior. I've verified that the stack frame size is right in all testcases, whether it changed or not. 7311323. llvm-svn: 89811
* Make capitalization of names starting "is" more consistent.Dale Johannesen2009-11-241-29/+29
| | | | | | No functional change. llvm-svn: 89724
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-121-4/+7
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* Modify how the prologue encoded the "move" information for the FDE. GCCBill Wendling2009-11-101-31/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | generates a sequence similar to this: __Z4funci: LFB2: mflr r0 LCFI0: stmw r30,-8(r1) LCFI1: stw r0,8(r1) LCFI2: stwu r1,-80(r1) LCFI3: mr r30,r1 LCFI4: where LCFI3 and LCFI4 are used by the FDE to indicate what the FP, LR, and other things are. We generated something more like this: Leh_func_begin1: mflr r0 stw r31, 20(r1) stw r0, 8(r1) Llabel1: stwu r1, -80(r1) Llabel2: mr r31, r1 Note that we are missing the "mr" instruction. This patch makes it more like the GCC output. llvm-svn: 86729
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-5/+8
| | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
* Simplify RegScavenger::FindUnusedReg.Jakob Stoklund Olesen2009-08-181-1/+1
| | | | | | | | | - Drop the Candidates argument and fix all callers. Now that RegScavenger tracks available registers accurately, there is no need to restict the search. - Make sure that no aliases of the found register are in use. This was a potential bug. llvm-svn: 79369
* Add support for the PowerPC 64-bit SVR4 ABI.Tilmann Scheller2009-08-151-13/+108
| | | | | | | | | | | | | | | | | The Link Register is volatile when using the 32-bit SVR4 ABI. Make it possible to use the 64-bit SVR4 ABI. Add non-volatile registers for the 64-bit SVR4 ABI. Make sure r2 is a reserved register when using the 64-bit SVR4 ABI. Update PPCFrameInfo for the 64-bit SVR4 ABI. Add FIXME for 64-bit Darwin PPC. Insert NOP instruction after direct function calls. Emit official procedure descriptors. Create TOC entries for GlobalAddress references. Spill 64-bit non-volatile registers to the correct slots. Only custom lower VAARG when using the 32-bit SVR4 ABI. Use simple VASTART lowering for the 64-bit SVR4 ABI. llvm-svn: 79091
* Give getPointerRegClass() a "kind" value so that targets can Chris Lattner2009-07-291-3/+3
| | | | | | support multiple different pointer register classes. llvm-svn: 77501
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-2/+2
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-1/+1
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-2/+3
| | | | | | Finish converting lib/Target. llvm-svn: 75043
* Various small changes related to the Condition Register on PowerPC.Tilmann Scheller2009-07-031-2/+3
| | | | | | | | Don't spill to the CR save area when using the SVR4 ABI for now. Don't rely on constants assigned for registers to be in order (they aren't assigned in order). Make sure CR bits are mapped to the corresponding CR field. llvm-svn: 74767
* Refactor ABI code in the PowerPC backend.Tilmann Scheller2009-07-031-33/+31
| | | | | | | | | | | Make CalculateParameterAndLinkageAreaSize() Darwin-specific. Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin(). Rename MachoABI to DarwinABI for consistency. Rename ELF ABI to SVR4 ABI for consistency. Factor out common call return lowering between the Darwin and SVR4 ABI. Factor out common call lowering between the Darwin and SVR4 ABI. llvm-svn: 74766
* Implement the SVR4 ABI for PowerPC.Tilmann Scheller2009-07-031-18/+205
| | | | | | | | | | | | | | | | | | | | | | | | Implement LowerFORMAL_ARGUMENTS_SVR4(). Implement LowerCALL_SVR4(). Add support for split arguments. Implement by value parameter passing for aggregates. Add support for variable argument lists. Create the spill area for argument registers of variable argument functions no longer at a fixed offset. Make sure callee saved registers are spilled to the correct stack offsets. Change allocation order of non-volatile floating-point registers. Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls. Add support for variable argument calls with Vector arguments. Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers. Stop creating illegal i8 values in LowerVASTART(). Add memory access width hints. Make sure to reserve space on the stack for the frame pointer. When using the SVR4 ABI, reserve r13 for the Small Data Area pointer. Assure that the frame pointer is spilled to the correct location on the stack. Some FP registers were not marked as volatile. Make sure the i64 words from a long double are passed either both in registers or both on the stack. Only put integer arguments in registers which are not marked with the inreg flag. llvm-svn: 74765
* Add new function attribute - noredzone. Devang Patel2009-06-041-0/+1
| | | | | | | Update code generator to use this attribute and remove DisableRedZone target option. Update llc to set this attribute when -disable-red-zone command line option is used. llvm-svn: 72894
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-20/+20
| | | | | | | | | | | | booleans. This gives a better indication of what the "addReg()" is doing. Remembering what all of those booleans mean isn't easy, especially if you aren't spending all of your time in that code. I took Jakob's suggestion and made it illegal to pass in "true" for the flag. This should hopefully prevent any unintended misuse of this (by reverting to the old way of using addReg()). llvm-svn: 71722
* fix warning in -asserts build.Chris Lattner2009-03-261-4/+2
| | | | llvm-svn: 67736
* Fix a bunch of Doxygen syntax issues. Escape special characters,Dan Gohman2009-03-031-2/+2
| | | | | | and put @file directives on their own comment line. llvm-svn: 65920
* Remove refs to non-DebugLoc version of BuildMI from PowerPC.Dale Johannesen2009-02-131-80/+90
| | | | llvm-svn: 64431
* Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.Evan Cheng2009-02-061-0/+9
| | | | llvm-svn: 63938
* Respect the DisableRedZone flag on PowerPC.Dan Gohman2009-01-271-1/+2
| | | | llvm-svn: 63119
* Add a RM pseudoreg for the rounding mode, whichDale Johannesen2008-10-291-1/+2
| | | | | | | | | | | | | | | | | allows ppcf128->int conversion to work with DeadInstructionElimination. This is now turned off but RM is harmless. It does not do a complete job of modeling the rounding mode. Revert marking MFCR as using all 7 CR subregisters; while correct, this caused the problem in PR 2964, plus the local RA crash noted in the comments. This was needed to make DeadInstructionElimination, but as we are not running that, it is backed out for now. Eventually it should go back in and the other problems fixed where they're broken. llvm-svn: 58391
* Rewrite logic to figure out whether LR needs toDale Johannesen2008-10-241-23/+23
| | | | | | | | be saved/restored in the prolog/epilog. We need to do this iff something in the function stores into it. llvm-svn: 58116
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-4/+4
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-261-1/+0
| | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... llvm-svn: 56703
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-261-0/+1
| | | | | | disabled when frame address is desired. Also add support for depth > 0. llvm-svn: 56683
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-2/+2
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Trim unnecessary #includes.Dan Gohman2008-07-111-1/+0
| | | | llvm-svn: 53471
* Simplify this use of BuildMI. This is also in preparation forDan Gohman2008-07-071-3/+1
| | | | | | pool-allocating MachineInstrs. llvm-svn: 53198
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-2/+2
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Tail call optimization improvements:Arnold Schwaighofer2008-04-301-9/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
* Reverse sense of unwind-tables option. This meansDale Johannesen2008-04-141-1/+1
| | | | | | | stack tracebacks on Darwin x86-64 won't work by default; nevertheless, everybody but me thinks this is a good idea. llvm-svn: 49663
* Implement new llc flag -disable-required-unwind-tables.Dale Johannesen2008-04-081-1/+2
| | | | | | Corresponds to -fno-unwind-tables (usually default in gcc). llvm-svn: 49361
* Cosmetic changes per EH patch review feedback.Dale Johannesen2008-04-021-3/+3
| | | | llvm-svn: 49096
* Recommitting EH patch; this should answer most of theDale Johannesen2008-04-021-2/+5
| | | | | | | | | | | | | | | review feedback. -enable-eh is still accepted but doesn't do anything. EH intrinsics use Dwarf EH if the target supports that, and are handled by LowerInvoke otherwise. The separation of the EH table and frame move data is, I think, logically figured out, but either one still causes full EH info to be generated (not sure how to split the metadata correctly). MachineModuleInfo::needsFrameInfo is no longer used and is removed. llvm-svn: 49064
* Revert 49006 for the moment.Dale Johannesen2008-04-011-5/+2
| | | | llvm-svn: 49046
* Emit exception handling info for functions which areDale Johannesen2008-03-311-2/+5
| | | | | | | | | | | not marked nounwind, or for all functions when -enable-eh is set, provided the target supports Dwarf EH. llvm-gcc generates nounwind in the right places; other FEs will need to do so also. Given such a FE, -enable-eh should no longer be needed. llvm-svn: 49006
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