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authorDan Gohman <gohman@apple.com>2008-10-03 15:45:36 +0000
committerDan Gohman <gohman@apple.com>2008-10-03 15:45:36 +0000
commit0d1e9a8e0401048b5619dd46afb744af7b028aff (patch)
tree0b150971be1244ee265f214d4bcad572ace4128f /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
parent6d8e67f512cabbd7745d4dd71b710806a8abc166 (diff)
downloadbcm5719-llvm-0d1e9a8e0401048b5619dd46afb744af7b028aff.tar.gz
bcm5719-llvm-0d1e9a8e0401048b5619dd46afb744af7b028aff.zip
Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc. llvm-svn: 57006
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 014925e1a6d..586ad6bcf58 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -629,7 +629,7 @@ void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// Find out which operand is the frame index.
unsigned FIOperandNo = 0;
- while (!MI.getOperand(FIOperandNo).isFrameIndex()) {
+ while (!MI.getOperand(FIOperandNo).isFI()) {
++FIOperandNo;
assert(FIOperandNo != MI.getNumOperands() &&
"Instr doesn't have FrameIndex operand!");
@@ -1242,7 +1242,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
if (UsesTCRet) {
int MaxTCRetDelta = FI->getTailCallSPDelta();
MachineOperand &StackAdjust = MBBI->getOperand(1);
- assert( StackAdjust.isImmediate() && "Expecting immediate value.");
+ assert(StackAdjust.isImm() && "Expecting immediate value.");
// Adjust stack pointer.
int StackAdj = StackAdjust.getImm();
int Delta = StackAdj - MaxTCRetDelta;
@@ -1368,7 +1368,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
} else if (RetOpcode == PPC::TCRETURNri) {
MBBI = prior(MBB.end());
MachineOperand &JumpTarget = MBBI->getOperand(0);
- assert(JumpTarget.isRegister() && "Expecting register operand.");
+ assert(JumpTarget.isReg() && "Expecting register operand.");
BuildMI(MBB, MBBI, TII.get(PPC::TAILBCTR));
} else if (RetOpcode == PPC::TCRETURNai) {
MBBI = prior(MBB.end());
@@ -1382,7 +1382,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
} else if (RetOpcode == PPC::TCRETURNri8) {
MBBI = prior(MBB.end());
MachineOperand &JumpTarget = MBBI->getOperand(0);
- assert(JumpTarget.isRegister() && "Expecting register operand.");
+ assert(JumpTarget.isReg() && "Expecting register operand.");
BuildMI(MBB, MBBI, TII.get(PPC::TAILBCTR8));
} else if (RetOpcode == PPC::TCRETURNai8) {
MBBI = prior(MBB.end());
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