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| author | Dan Gohman <gohman@apple.com> | 2010-04-15 17:08:50 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-04-15 17:08:50 +0000 |
| commit | b29cda9b3c39fbbd53db44dbc5075d5445a98200 (patch) | |
| tree | b858a95e9c0cad74c71661ecada32e5fdbd6041a /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | 345356ee9a30b0d7653219e1d97e60c5cd116241 (diff) | |
| download | bcm5719-llvm-b29cda9b3c39fbbd53db44dbc5075d5445a98200.tar.gz bcm5719-llvm-b29cda9b3c39fbbd53db44dbc5075d5445a98200.zip | |
Fix a bunch of namespace polution.
llvm-svn: 101376
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index 52d87cde803..b488af562c7 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -56,14 +56,14 @@ using namespace llvm; #define ALIGN_STACK 0 // FIXME (64-bit): Eventually enable by default. -cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger", - cl::init(false), - cl::desc("Enable PPC32 register scavenger"), - cl::Hidden); -cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger", - cl::init(false), - cl::desc("Enable PPC64 register scavenger"), - cl::Hidden); +static cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger", + cl::init(false), + cl::desc("Enable PPC32 register scavenger"), + cl::Hidden); +static cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger", + cl::init(false), + cl::desc("Enable PPC64 register scavenger"), + cl::Hidden); #define EnableRegisterScavenging \ ((EnablePPC32RS && !Subtarget.isPPC64()) || \ (EnablePPC64RS && Subtarget.isPPC64())) |
