| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | LLVM support for vector quad bit permute and gather instructions through buil... | Nemanja Ivanovic | 2015-06-11 | 1 | -1/+3 |
| * | This patch adds support for the vector quadword add/sub instructions introduced | Kit Barton | 2015-05-25 | 1 | -0/+17 |
| * | [PPC64] Add vector pack/unpack support from ISA 2.07 | Bill Schmidt | 2015-05-16 | 1 | -0/+35 |
| * | This patch adds ABI support for v1i128 data type. | Kit Barton | 2015-05-05 | 1 | -0/+11 |
| * | Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" | Sergey Dmitrouk | 2015-04-28 | 1 | -6/+6 |
| * | Revert "[DebugInfo] Add debug locations to constant SD nodes" | Daniel Jasper | 2015-04-28 | 1 | -6/+6 |
| * | [DebugInfo] Add debug locations to constant SD nodes | Sergey Dmitrouk | 2015-04-28 | 1 | -6/+6 |
| * | [PPC64LE] Remove unnecessary swaps from lane-insensitive vector computations | Bill Schmidt | 2015-04-27 | 1 | -0/+15 |
| * | [PowerPC] Correct typo in PPCInstrAltivec.td | Bill Schmidt | 2015-03-18 | 1 | -1/+1 |
| * | [PowerPC] Remove canFoldAsLoad from instruction definitions | Hal Finkel | 2015-03-11 | 1 | -1/+1 |
| * | Change the generation of the vmuluwm instruction to be based on the MUL opcode. | Kit Barton | 2015-03-10 | 1 | -2/+3 |
| * | While reviewing the changes to Clang to add builtin support for the vsld, vsr... | Kit Barton | 2015-03-05 | 1 | -4/+10 |
| * | Add LLVM support for PPC cryptography builtins | Nemanja Ivanovic | 2015-03-04 | 1 | -0/+40 |
| * | Add the following 64-bit vector integer arithmetic instructions added in POWER8: | Kit Barton | 2015-03-03 | 1 | -1/+44 |
| * | I incorrectly marked the VORC instruction as isCommutable when I added it. | Kit Barton | 2015-02-20 | 1 | -1/+2 |
| * | This patch adds the VSX logical instructions introduced in the Power ISA 2.07... | Kit Barton | 2015-02-18 | 1 | -2/+0 |
| * | This change implements the following three logical vector operations: | Kit Barton | 2015-02-09 | 1 | -0/+25 |
| * | [PowerPC] Implement the vclz instructions for PWR8 | Bill Schmidt | 2015-02-05 | 1 | -0/+15 |
| * | [PowerPC] Implement the vpopcnt instructions for POWER8 | Bill Schmidt | 2015-02-03 | 1 | -0/+25 |
| * | [PowerPC] Swap arguments and adjust shift count for vsldoi on little endian | Bill Schmidt | 2014-08-05 | 1 | -7/+20 |
| * | [PowerPC] Swap arguments to vpkuhum/vpkuwum on little-endian | Ulrich Weigand | 2014-08-04 | 1 | -8/+22 |
| * | Don't use additional arguments for dss and friends to satisfy DSS_Form, | Joerg Sonnenberger | 2014-08-02 | 1 | -61/+53 |
| * | [PATCH][PPC64LE] Correct little-endian usage of vmrgh* and vmrgl*. | Bill Schmidt | 2014-07-25 | 1 | -24/+56 |
| * | [PPC64LE] Recognize shufflevector patterns for little endian | Bill Schmidt | 2014-06-10 | 1 | -23/+39 |
| * | Reset the subtarget for DAGToDAG on every iteration of runOnMachineFunction. | Eric Christopher | 2014-05-22 | 1 | -1/+1 |
| * | [PowerPC] Mark many instructions as commutative | Hal Finkel | 2014-03-24 | 1 | -3/+13 |
| * | Add IIC_ prefix to PPC instruction-class names | Hal Finkel | 2013-11-27 | 1 | -78/+80 |
| * | Mark PPC MFTB and DST (and friends) as deprecated | Hal Finkel | 2013-09-12 | 1 | -10/+20 |
| * | PPC: Add some missing V_SET0 patterns | Hal Finkel | 2013-07-11 | 1 | -2/+15 |
| * | [PowerPC] Make specialized AltiVec patterns isCodeGenOnly | Ulrich Weigand | 2013-07-03 | 1 | -2/+3 |
| * | PowerPC: Use RegisterOperand instead of RegisterClass operands | Ulrich Weigand | 2013-04-26 | 1 | -72/+72 |
| * | PowerPC: Fix encoding of vsubcuw and vsum4sbs instructions | Ulrich Weigand | 2013-04-26 | 1 | -2/+2 |
| * | PPC: Add a FIXME regarding the non-working fma+fneg Altivec pattern | Hal Finkel | 2013-04-03 | 1 | -0/+2 |
| * | More direct types in PowerPC AltiVec intrinsics. | Ulrich Weigand | 2013-04-03 | 1 | -47/+29 |
| * | Use PPC reciprocal estimates with Newton iteration in fast-math mode | Hal Finkel | 2013-04-03 | 1 | -0/+3 |
| * | Use direct types in most PowerPC Altivec instructions and patterns. | Bill Schmidt | 2013-03-28 | 1 | -236/+333 |
| * | PowerPC: Mark patterns as isCodeGenOnly. | Ulrich Weigand | 2013-03-26 | 1 | -0/+3 |
| * | Protect PPC Altivec patterns with a predicate | Hal Finkel | 2013-03-15 | 1 | -0/+6 |
| * | This patch fixes the Altivec addend construction for the fused multiply-add | Adhemerval Zanella | 2012-11-30 | 1 | -5/+7 |
| * | PowerPC: Lowering floor intrinsic for Altivec | Adhemerval Zanella | 2012-11-15 | 1 | -0/+10 |
| * | Add floating-point to and from integer conversion | Adhemerval Zanella | 2012-10-08 | 1 | -0/+32 |
| * | Convert the PPC backend to use the new FMA infrastructure. | Hal Finkel | 2012-06-22 | 1 | -7/+3 |
| * | Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore. | Hal Finkel | 2012-04-01 | 1 | -24/+24 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -3/+3 |
| * | fix up vnot matching, eliminating a dead pattern, correcting a couple of | Chris Lattner | 2010-03-28 | 1 | -6/+11 |
| * | Fix a bunch of ambiguous patterns which tblgen happens to infer types | Chris Lattner | 2010-03-08 | 1 | -7/+7 |
| * | PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec | Eli Friedman | 2009-06-07 | 1 | -0/+22 |
| * | 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan. | Nate Begeman | 2009-04-27 | 1 | -82/+97 |
| * | Revert 69952. Causes testsuite failures on linux x86-64. | Rafael Espindola | 2009-04-24 | 1 | -97/+82 |
| * | PR2957 | Nate Begeman | 2009-04-24 | 1 | -82/+97 |
