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path: root/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
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* Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"Sergey Dmitrouk2015-04-281-4/+5
* Revert "[DebugInfo] Add debug locations to constant SD nodes"Daniel Jasper2015-04-281-5/+4
* [DebugInfo] Add debug locations to constant SD nodesSergey Dmitrouk2015-04-281-4/+5
* Add LLVM support for remaining integer divide and permute instructions from I...Nemanja Ivanovic2015-04-091-8/+28
* Add Hardware Transactional Memory (HTM) SupportKit Barton2015-03-251-0/+6
* [PowerPC] Remove canFoldAsLoad from instruction definitionsHal Finkel2015-03-111-3/+3
* Add support for part-word atomics for PPCNemanja Ivanovic2015-03-101-6/+10
* [PowerPC] Cleanup unused target-specific SDAG nodesHal Finkel2015-02-251-10/+6
* [PowerPC] Fix reverted patch r227976 to avoid register assignment issuesBill Schmidt2015-02-101-3/+44
* Revert "r227976 - [PowerPC] Yet another approach to __tls_get_addr" and relat...Hal Finkel2015-02-061-12/+3
* [PowerPC] Yet another approach to __tls_get_addrBill Schmidt2015-02-031-3/+12
* [PowerPC] Better scheduling for isel on P7/P8Hal Finkel2015-02-011-1/+1
* [PowerPC] Loosen ELFv1 PPC64 func descriptor loads for indirect callsHal Finkel2015-01-151-10/+0
* [PowerPC] Split the blr definition into BLR and BLR8Hal Finkel2015-01-131-0/+3
* [PowerPC] Remove zexts after i32 ctlzHal Finkel2015-01-051-1/+4
* [PowerPC] Remove zexts after byte-swapping loadsHal Finkel2015-01-051-0/+7
* [PowerPC] Add support for the CMPB instructionHal Finkel2015-01-031-0/+5
* [PowerPC] Improve instruction selection bit-permuting operations (64-bit)Hal Finkel2015-01-011-2/+0
* [PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64Hal Finkel2014-12-231-0/+11
* [PowerPC] Add a DAGToDAG peephole to remove unnecessary zero-extsHal Finkel2014-12-121-2/+10
* Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.Craig Topper2014-11-261-11/+11
* [PowerPC] Replace foul hackery with real calls to __tls_get_addrBill Schmidt2014-11-111-10/+3
* [PowerPC] Load BlockAddress values from the TOC in 64-bit SVR4 codeUlrich Weigand2014-10-311-1/+5
* [Power] Improve the expansion of atomic loads/storesRobin Morisset2014-10-021-0/+6
* [PPC64] Add missing dependency on X2 to LDinto_toc.Bill Schmidt2014-08-151-1/+1
* [PowerPC] Simplify and improve loading into TOC registerUlrich Weigand2014-06-181-11/+5
* [PowerPC] Mark many instructions as commutativeHal Finkel2014-03-241-0/+13
* Add CR-bit tracking to the PowerPC backend for i1 valuesHal Finkel2014-02-281-8/+41
* [PPC] Use the correct immediate operands on 64-bit instructionsHal Finkel2014-01-021-8/+8
* Implement initial-exec TLS for PPC32.Roman Divacky2013-12-201-4/+0
* Add a disassembler to the PowerPC backendHal Finkel2013-12-191-0/+3
* Eliminate PPC instruction decoding ambiguitiesHal Finkel2013-12-171-27/+37
* Split some PPC itinerary classesHal Finkel2013-11-301-8/+8
* Add IIC_ prefix to PPC instruction-class namesHal Finkel2013-11-271-144/+149
* PPC popcnt[dw] do not have record formsHal Finkel2013-11-201-6/+6
* PPC: Do not introduce ISD nodes for fctid and fctiwDavid Majnemer2013-09-261-1/+1
* PPC: Add support for fctid and fctiwDavid Majnemer2013-09-261-0/+3
* PPC: Enable aggressive anti-dependency breakingHal Finkel2013-09-121-0/+1
* [PowerPC] Add loads, stores, and related things to fast-isel.Bill Schmidt2013-08-301-0/+9
* [PowerPC] More fast-isel chunks (returns and integer extends)Bill Schmidt2013-08-261-0/+16
* Add PPC64 mulli patternHal Finkel2013-08-061-0/+3
* PPC: Add CTR-register clobber to builtin setjmpHal Finkel2013-07-171-0/+1
* [PowerPC] Support @tls in the asm parserUlrich Weigand2013-07-051-2/+6
* [PowerPC] Use mtocrf when availableUlrich Weigand2013-07-031-1/+5
* [PowerPC] Always use mfocrf if availableUlrich Weigand2013-07-031-6/+4
* [PowerPC] Support mtspr/mfspr in the asm parserUlrich Weigand2013-07-031-1/+1
* [PowerPC] PR16512 - Support TLS call sequences in the asm parserUlrich Weigand2013-07-021-0/+3
* [PowerPC] Rework TLS call operand processingUlrich Weigand2013-07-021-7/+8
* [PowerPC] Accept 17-bit signed immediates for addisUlrich Weigand2013-06-261-2/+10
* [PowerPC] Support symbolic u16imm operandsUlrich Weigand2013-06-261-1/+2
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