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path: root/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
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* [NFC] [PowerPC] Add isPredicable for basic instrsQiu Chaofan2020-01-101-7/+9
* [PowerPC][NFC] Rename record instructions to use _rec suffix instead of oJinsong Ji2020-01-061-7/+7
* [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0Kang Zhang2019-12-261-0/+2
* [PowerPC][NFC] Rename ANDI(S)o8 to ANDI(S)8oJinsong Ji2019-12-091-2/+2
* [PowerPC] Implementing overflow version for XO-Form instructionsStefan Pintile2019-11-111-27/+17
* [PowerPC] Clear the sideeffect bit for those instructions that didn't have th...QingShan Zhang2019-10-301-1/+1
* [NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming conven...Jason Liu2019-07-221-2/+2
* [PowerPC][Peephole] Combine extsw and sldi after instruction selectionKai Luo2019-07-091-4/+11
* [CodeGen] Generic Hardware Loop SupportSam Parker2019-06-071-1/+1
* [AIX] Implement function descriptor on SDAGJason Liu2019-06-061-0/+6
* [PowerPC] use meaningful name for displacement form aligned with x-form - NFCChen Zheng2019-05-221-6/+6
* [PowerPC] [ISEL] select x-form instruction for unaligned offsetChen Zheng2019-05-221-5/+5
* [PowerPC] More precise exploitation of P9 maddld instruction when operands ar...Zi Xuan Wu2019-04-121-2/+2
* [PowerPC] exploit P9 instruction maddld.Chen Zheng2019-02-201-3/+11
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [PowerPC] Exploit power9 new instruction setbKewen Lin2018-12-181-2/+6
* [PowerPC][NFC] Sorting out Pseudo related classes to avoid confusionJinsong Ji2018-12-131-72/+70
* [PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have flag isBarrier.Chen Zheng2018-12-131-1/+6
* [PowerPC] Add Itineraries for STWU/STWUX etcJinsong Ji2018-11-201-8/+8
* [PowerPC] Recommit r340016 after fixing the reported issueNemanja Ivanovic2018-08-271-2/+3
* Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift ...Eric Christopher2018-08-211-3/+2
* [PowerPC] Generate Power9 extswsli extend sign and shift immediate instructionNemanja Ivanovic2018-08-171-2/+3
* [PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/storesZaara Syeda2018-05-281-1/+28
* [PowerPC] Infrastructure work. Implement getting the opcode for a spill in on...Stefan Pintilie2018-03-261-106/+119
* [PowerPC] Optimize TLS initial-exec sequence to use X-Form loads/storesZaara Syeda2018-03-151-1/+43
* [PowerPC] Convert r+r instructions to r+i (pre and post RA)Nemanja Ivanovic2017-12-151-0/+5
* [Power9] Add missing Power9 instructions.Tony Jiang2017-09-191-0/+12
* [Power9] Add missing instructions: extswsli, popcntbStefan Pintilie2017-09-131-0/+8
* [PPC] Add Defs = [CARRY] to MIR SRADI_32Guozhi Wei2017-07-211-1/+1
* [PowerPC] define target hook isReallyTriviallyReMaterializable()Lei Huang2017-06-211-2/+4
* [PPC] Remove isBarrier from CFENCE8's definition.Tim Shen2017-06-171-1/+1
* [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions.Tony Jiang2017-06-121-0/+10
* [PowerPC] Eliminate integer compare instructions - vol. 2Nemanja Ivanovic2017-05-311-6/+6
* PPC: Correct Size for GETtlsADDRKyle Butt2017-05-251-1/+3
* [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync.Tim Shen2017-05-161-0/+4
* [PowerPC] Eliminate integer compare instructions - vol. 1Nemanja Ivanovic2017-05-111-4/+24
* [PowerPC] Use subfic instruction for subtract from immediateNemanja Ivanovic2017-02-241-0/+4
* [PPC] cleanup of mayLoad/mayStore flags and memory operands.Sean Fertile2017-01-261-3/+3
* [PowerPC] Implement missing ISA 2.06 instructions.Tony Jiang2017-01-051-0/+3
* Target: Remove unused patterns and transforms. NFC.Peter Collingbourne2016-10-071-10/+0
* [PowerPC] Implement lowering for atomicrmw min/max/umin/umaxHal Finkel2016-08-281-0/+12
* [PPC64] Fix SUBFC8 Defs listKeno Fischer2016-06-011-2/+2
* This reverts commit r265505.Kit Barton2016-04-281-57/+0
* [PowerPC] [PR27387] Disallow r0 for ADD8TLS.Marcin Koscielnicki2016-04-251-2/+4
* [PowerPC] Basic support for P9 byte comparison and count trailing zero insnsNemanja Ivanovic2016-04-131-1/+15
* [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random nu...Chuang-Yu Cheng2016-04-061-0/+57
* [Power9] Implement copy-paste, msgsync, slb, and stop instructionsChuang-Yu Cheng2016-04-061-0/+21
* [PowerPC] Basic support for P9 atomic loads and storesNemanja Ivanovic2016-03-311-0/+14
* Prevent renaming of CR fields in AADB when a CR restore is presentNemanja Ivanovic2016-01-081-1/+14
* Introduce new @llvm.get.dynamic.area.offset.i{32, 64} intrinsics.Yury Gribov2015-12-011-0/+2
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