| Commit message (Expand) | Author | Age | Files | Lines |
* | [NFC] [PowerPC] Add isPredicable for basic instrs | Qiu Chaofan | 2020-01-10 | 1 | -7/+9 |
* | [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o | Jinsong Ji | 2020-01-06 | 1 | -7/+7 |
* | [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0 | Kang Zhang | 2019-12-26 | 1 | -0/+2 |
* | [PowerPC][NFC] Rename ANDI(S)o8 to ANDI(S)8o | Jinsong Ji | 2019-12-09 | 1 | -2/+2 |
* | [PowerPC] Implementing overflow version for XO-Form instructions | Stefan Pintile | 2019-11-11 | 1 | -27/+17 |
* | [PowerPC] Clear the sideeffect bit for those instructions that didn't have th... | QingShan Zhang | 2019-10-30 | 1 | -1/+1 |
* | [NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming conven... | Jason Liu | 2019-07-22 | 1 | -2/+2 |
* | [PowerPC][Peephole] Combine extsw and sldi after instruction selection | Kai Luo | 2019-07-09 | 1 | -4/+11 |
* | [CodeGen] Generic Hardware Loop Support | Sam Parker | 2019-06-07 | 1 | -1/+1 |
* | [AIX] Implement function descriptor on SDAG | Jason Liu | 2019-06-06 | 1 | -0/+6 |
* | [PowerPC] use meaningful name for displacement form aligned with x-form - NFC | Chen Zheng | 2019-05-22 | 1 | -6/+6 |
* | [PowerPC] [ISEL] select x-form instruction for unaligned offset | Chen Zheng | 2019-05-22 | 1 | -5/+5 |
* | [PowerPC] More precise exploitation of P9 maddld instruction when operands ar... | Zi Xuan Wu | 2019-04-12 | 1 | -2/+2 |
* | [PowerPC] exploit P9 instruction maddld. | Chen Zheng | 2019-02-20 | 1 | -3/+11 |
* | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
* | [PowerPC] Exploit power9 new instruction setb | Kewen Lin | 2018-12-18 | 1 | -2/+6 |
* | [PowerPC][NFC] Sorting out Pseudo related classes to avoid confusion | Jinsong Ji | 2018-12-13 | 1 | -72/+70 |
* | [PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have flag isBarrier. | Chen Zheng | 2018-12-13 | 1 | -1/+6 |
* | [PowerPC] Add Itineraries for STWU/STWUX etc | Jinsong Ji | 2018-11-20 | 1 | -8/+8 |
* | [PowerPC] Recommit r340016 after fixing the reported issue | Nemanja Ivanovic | 2018-08-27 | 1 | -2/+3 |
* | Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift ... | Eric Christopher | 2018-08-21 | 1 | -3/+2 |
* | [PowerPC] Generate Power9 extswsli extend sign and shift immediate instruction | Nemanja Ivanovic | 2018-08-17 | 1 | -2/+3 |
* | [PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/stores | Zaara Syeda | 2018-05-28 | 1 | -1/+28 |
* | [PowerPC] Infrastructure work. Implement getting the opcode for a spill in on... | Stefan Pintilie | 2018-03-26 | 1 | -106/+119 |
* | [PowerPC] Optimize TLS initial-exec sequence to use X-Form loads/stores | Zaara Syeda | 2018-03-15 | 1 | -1/+43 |
* | [PowerPC] Convert r+r instructions to r+i (pre and post RA) | Nemanja Ivanovic | 2017-12-15 | 1 | -0/+5 |
* | [Power9] Add missing Power9 instructions. | Tony Jiang | 2017-09-19 | 1 | -0/+12 |
* | [Power9] Add missing instructions: extswsli, popcntb | Stefan Pintilie | 2017-09-13 | 1 | -0/+8 |
* | [PPC] Add Defs = [CARRY] to MIR SRADI_32 | Guozhi Wei | 2017-07-21 | 1 | -1/+1 |
* | [PowerPC] define target hook isReallyTriviallyReMaterializable() | Lei Huang | 2017-06-21 | 1 | -2/+4 |
* | [PPC] Remove isBarrier from CFENCE8's definition. | Tim Shen | 2017-06-17 | 1 | -1/+1 |
* | [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions. | Tony Jiang | 2017-06-12 | 1 | -0/+10 |
* | [PowerPC] Eliminate integer compare instructions - vol. 2 | Nemanja Ivanovic | 2017-05-31 | 1 | -6/+6 |
* | PPC: Correct Size for GETtlsADDR | Kyle Butt | 2017-05-25 | 1 | -1/+3 |
* | [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync. | Tim Shen | 2017-05-16 | 1 | -0/+4 |
* | [PowerPC] Eliminate integer compare instructions - vol. 1 | Nemanja Ivanovic | 2017-05-11 | 1 | -4/+24 |
* | [PowerPC] Use subfic instruction for subtract from immediate | Nemanja Ivanovic | 2017-02-24 | 1 | -0/+4 |
* | [PPC] cleanup of mayLoad/mayStore flags and memory operands. | Sean Fertile | 2017-01-26 | 1 | -3/+3 |
* | [PowerPC] Implement missing ISA 2.06 instructions. | Tony Jiang | 2017-01-05 | 1 | -0/+3 |
* | Target: Remove unused patterns and transforms. NFC. | Peter Collingbourne | 2016-10-07 | 1 | -10/+0 |
* | [PowerPC] Implement lowering for atomicrmw min/max/umin/umax | Hal Finkel | 2016-08-28 | 1 | -0/+12 |
* | [PPC64] Fix SUBFC8 Defs list | Keno Fischer | 2016-06-01 | 1 | -2/+2 |
* | This reverts commit r265505. | Kit Barton | 2016-04-28 | 1 | -57/+0 |
* | [PowerPC] [PR27387] Disallow r0 for ADD8TLS. | Marcin Koscielnicki | 2016-04-25 | 1 | -2/+4 |
* | [PowerPC] Basic support for P9 byte comparison and count trailing zero insns | Nemanja Ivanovic | 2016-04-13 | 1 | -1/+15 |
* | [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random nu... | Chuang-Yu Cheng | 2016-04-06 | 1 | -0/+57 |
* | [Power9] Implement copy-paste, msgsync, slb, and stop instructions | Chuang-Yu Cheng | 2016-04-06 | 1 | -0/+21 |
* | [PowerPC] Basic support for P9 atomic loads and stores | Nemanja Ivanovic | 2016-03-31 | 1 | -0/+14 |
* | Prevent renaming of CR fields in AADB when a CR restore is present | Nemanja Ivanovic | 2016-01-08 | 1 | -1/+14 |
* | Introduce new @llvm.get.dynamic.area.offset.i{32, 64} intrinsics. | Yury Gribov | 2015-12-01 | 1 | -0/+2 |