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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.h
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* [PowerPC] custom lower `v2f64 fpext v2f32`Lei Huang2019-05-101-0/+8
* [TargetLowering] Change getOptimalMemOpType to take a function attribute listSjoerd Meijer2019-04-301-1/+1
* [PowerPC] Allow using initial-exec TLS with PICJoerg Sonnenberger2019-04-241-2/+2
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2019-04-091-2/+2
* [PowerPC] Strength reduction of multiply by a constant by shift and add/sub i...Zi Xuan Wu2019-03-291-0/+1
* [TargetLowering] Add code size information on isFPImmLegal. NFCAdhemerval Zanella2019-03-181-1/+2
* [PowerPC] Avoid scalarization of vector truncateRoland Froese2019-02-111-0/+2
* [PPC] Include tablegenerated PPCGenCallingConv.inc onceReid Kleckner2019-01-291-26/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [PowerPC] Implement the isSelectSupported() target hookKang Zhang2018-12-201-0/+5
* [PowerPC]Exploit P9 vabsdu for unsigned vselect patternsKewen Lin2018-12-191-0/+1
* [PowerPC] Improve vec_abs on P9Kewen Lin2018-12-181-0/+17
* [NFC] [PowerPC] add an routine in PPCTargetLowering to determine if a global ...QingShan Zhang2018-12-031-0/+3
* [TargetLowering] Change TargetLoweringBase::getPreferredVectorAction to take ...Craig Topper2018-11-051-1/+1
* [PowerPC] Fix some missed optimization opportunities in combineSetCCLi Jia He2018-10-261-0/+1
* [PowerPC] Keep vector int to fp conversions in vector domainNemanja Ivanovic2018-10-261-0/+3
* [Power9] Add __float128 support in the backend for bitcast to a i128Stefan Pintilie2018-10-231-0/+1
* [PowerPC] Implement hasBitPreservingFPLogic for types that can be supportedNemanja Ivanovic2018-10-091-0/+1
* [PowerPC] Combine ADD to ADDZEQingShan Zhang2018-09-071-0/+1
* [PowerPC] Recommit r340016 after fixing the reported issueNemanja Ivanovic2018-08-271-0/+4
* Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift ...Eric Christopher2018-08-211-4/+0
* [PowerPC] Generate Power9 extswsli extend sign and shift immediate instructionNemanja Ivanovic2018-08-171-0/+4
* [DAGCombiner][TargetLowering] Pass a SmallVector instead of a std::vector to ...Craig Topper2018-07-301-1/+1
* [DAGCombiner][PowerPC][AArch64] Pass Created vector by reference to BuildSDIV...Craig Topper2018-07-301-1/+1
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* DAG: Add calling convention argument to calling convention funcsMatt Arsenault2018-07-281-0/+2
* Fix build failures from r337347, found by clangJustin Hibbits2018-07-181-2/+1
* Introduce codegen for the Signal Processing EngineJustin Hibbits2018-07-181-0/+9
* [Power9] Ensure float128 in non-homogenous aggregates are passed via VSX regLei Huang2018-07-051-0/+4
* [PowerPC] Unify handling for conversion of FP_TO_INT feeding a storeLei Huang2018-05-081-0/+7
* [PowerPC] Implement isMaskAndCmp0FoldingBeneficialNemanja Ivanovic2018-05-021-0/+1
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-2/+2
* [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code...Craig Topper2018-03-291-1/+1
* Fix layering by moving ValueTypes.h from CodeGen to IRDavid Blaikie2018-03-231-1/+1
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [PowerPC] Make AddrSpaceCast noopNemanja Ivanovic2018-03-191-0/+5
* [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAPNemanja Ivanovic2018-01-121-0/+6
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-2/+2
* TLI: Allow using PSV for intrinsic mem operandsMatt Arsenault2017-12-141-0/+1
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-8/+8
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* [PowerPC] Implement mayBeEmittedAsTailCall for PPCSean Fertile2017-11-151-0/+4
* Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles...Graham Yiu2017-11-061-0/+5
* [PPC] Use xxbrd to speed up bswap64Guozhi Wei2017-11-061-0/+1
* Adds code to PPC ISEL lowering to recognize half-word inserts from vector_shu...Graham Yiu2017-11-011-1/+8
* DAG: Add opcode and source type to isFPExtFreeMatt Arsenault2017-10-131-1/+1
* [PPC][NFC] Renaming things with 'xxinsert' moniker to 'vecinsert' to make it ...Tony Jiang2017-09-051-3/+3
* [DAG] convert vector select-of-constants to logic/mathSanjay Patel2017-08-241-1/+1
* Change CallLoweringInfo::CS to be an ImmutableCallSite instead of a pointer. ...Peter Collingbourne2017-07-261-5/+5
* [NFC] test commit.Stefan Pintilie2017-07-261-0/+8
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