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* Implement the real calling convention for ppc32 Altivec:Dale Johannesen2008-03-141-21/+118
| | | | | | | vectors go at the end of the memory area, after all non-vector parameters. llvm-svn: 48364
* Do not promote float params to double in varargsDale Johannesen2008-03-121-6/+0
| | | | | | | | | calls here. This was done earlier for params in the varargs part of the params; any float params that survive to here are in the non-varargs part, and must not be promoted. llvm-svn: 48310
* One more bit of Altivec parameter passing.Dale Johannesen2008-03-121-3/+5
| | | | llvm-svn: 48269
* Implement Altivec passing to varargs functions on ppc.Dale Johannesen2008-03-121-7/+72
| | | | llvm-svn: 48264
* Generalize ExpandIntToFP to handle the case where the operand is legalDan Gohman2008-03-111-0/+4
| | | | | | | | and it's the result that requires expansion. This code is a little confusing because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type (the integer type) rather than the result type. llvm-svn: 48206
* Default ISD::PREFETCH to expand.Evan Cheng2008-03-101-1/+0
| | | | llvm-svn: 48169
* Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel2008-03-101-1/+7
| | | | | | | | return ValueType can depend its operands' ValueType. This is a cosmetic change, no functionality impacted. llvm-svn: 48145
* Add description of individual bits in CR. This fix PR1765.Nicolas Geoffray2008-03-101-2/+2
| | | | llvm-svn: 48143
* Increase ISD::ParamFlags to 64 bits. Increase the ByValSizeDale Johannesen2008-03-101-7/+13
| | | | | | | | | | field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) llvm-svn: 48122
* Darwin PPC64 indirect call target goes in X12, not R12. This fixes theseChris Lattner2008-03-091-2/+3
| | | | | | | | two regression tests: test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll llvm-svn: 48120
* More ppc32 byval handling (bug fixes). ThingsDale Johannesen2008-03-081-3/+23
| | | | | | are looking pretty good now. llvm-svn: 48043
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ↵Evan Cheng2008-03-081-0/+1
| | | | | | and prefetchnta instructions. llvm-svn: 48042
* Add support for calls with i128 return values on ppc64.Dan Gohman2008-03-081-3/+13
| | | | llvm-svn: 48041
* PPC64 passes arguments of integral type in i64 registers, not i32. Reflect thisBill Wendling2008-03-071-26/+43
| | | | | | | by promoting smaller integral values (i32 at this point) to i64, then truncating to get the wanted size. llvm-svn: 48030
* Add support for lowering 128-bit shifts on ppc64.Dan Gohman2008-03-071-44/+60
| | | | llvm-svn: 48029
* Next bits of PPC byval handling. Basically functionalDale Johannesen2008-03-071-7/+73
| | | | | | but there are bugs. llvm-svn: 48028
* Next bit of PPC ByVal handling; call-site code seemsDale Johannesen2008-03-051-3/+11
| | | | | | correct now. llvm-svn: 47978
* Move PPC lowering functions into PPCTargetLoweringDale Johannesen2008-03-041-28/+82
| | | | | | | class (cosmetic). First piece of byval implementation; this doesn't work yet. No functional change. llvm-svn: 47917
* Interface of getByValTypeAlignment differed betweenDale Johannesen2008-02-281-0/+11
| | | | | | | | generic & x86 versions; change generic to follow x86 and improve comments. Add PPC version (not right for non-Darwin.) llvm-svn: 47734
* Don't hard-code the mask size to be 32, which is incorrect on ppc64Dan Gohman2008-02-271-3/+5
| | | | | | | and was causing aborts with the new APInt changes. This may also be fixing an obscure ppc64 bug. llvm-svn: 47692
* Convert the last remaining users of the non-APInt form ofDan Gohman2008-02-271-11/+19
| | | | | | | ComputeMaskedBits to use the APInt form, and remove the non-APInt form. llvm-svn: 47654
* I cannot find a libgcc function for this builtin. Therefor expanding it to ↵Andrew Lenharth2008-02-161-1/+2
| | | | | | a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. llvm-svn: 47213
* Change how FP immediates are handled. Nate Begeman2008-02-141-3/+0
| | | | | | | | | | | | | | 1) ConstantFP is now expand by default 2) ConstantFP is not turned into TargetConstantFP during Legalize if it is legal. This allows ConstantFP to be handled like Constant, allowing for targets that can encode FP immediates as MachineOperands. As a bonus, fix up Itanium FP constants, which now correctly match, and match more constants! Hooray. llvm-svn: 47121
* Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBitsDan Gohman2008-02-131-1/+1
| | | | | | to pass the mask APInt by value, not by reference. llvm-svn: 47096
* don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. Chris Lattner2008-02-131-12/+5
| | | | | | DAGCombine is now quite good at zapifying them. llvm-svn: 47053
* Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman2008-02-131-5/+4
| | | | | | | Add an overload that supports the uint64_t interface for use by clients that haven't been updated yet. llvm-svn: 47039
* Follow Chris' suggestion; change the PseudoSourceValue accessorsDan Gohman2008-02-071-1/+1
| | | | | | | to return pointers instead of references, since this is always what is needed. llvm-svn: 46857
* Re-apply the memory operand changes, with a fix for the staticDan Gohman2008-02-061-21/+27
| | | | | | | | initializer problem, a minor tweak to the way the DAGISelEmitter finds load/store nodes, and a renaming of the new PseudoSourceValue objects. llvm-svn: 46827
* Unbreak ppc debug support.Evan Cheng2008-02-021-0/+3
| | | | llvm-svn: 46665
* Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and ↵Evan Cheng2008-01-311-27/+21
| | | | | | re-commit. llvm-svn: 46623
* Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflictingDan Gohman2008-01-311-3/+3
| | | | | | with the real FLT_ROUNDS (defined in <float.h>). llvm-svn: 46587
* Create a new class, MemOperand, for describing memory referencesDan Gohman2008-01-311-21/+27
| | | | | | | | | | | | | | | | in the backend. Introduce a new SDNode type, MemOperandSDNode, for holding a MemOperand in the SelectionDAG IR, and add a MemOperand list to MachineInstr, and code to manage them. Remove the offset field from SrcValueSDNode; uses of SrcValueSDNode that were using it are all all using MemOperandSDNode now. Also, begin updating some getLoad and getStore calls to use the PseudoSourceValue objects. Most of this was written by Florian Brander, some reorganization and updating to TOT by me. llvm-svn: 46585
* Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a ↵Evan Cheng2008-01-301-2/+2
| | | | | | | | proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert instruction at the end. llvm-svn: 46562
* Factor the addressing mode and the load/store VT out of LoadSDNodeDan Gohman2008-01-301-3/+3
| | | | | | | | and StoreSDNode into their common base class LSBaseSDNode. Member functions getLoadedVT and getStoredVT are replaced with the common getMemoryVT to simplify code that will handle both loads and stores. llvm-svn: 46538
* The last pieces needed for loading arbitraryDuncan Sands2008-01-231-2/+2
| | | | | | | | | | | | | | | precision integers. This won't actually work (and most of the code is dead) unless the new legalization machinery is turned on. While there, I rationalized the handling of i1, and removed some bogus (and unused) sextload patterns. For i1, this could result in microscopically better code for some architectures (not X86). It might also result in worse code if annotating with AssertZExt nodes turns out to be more harmful than helpful. llvm-svn: 46280
* Implement flt_rounds for PowerPC.Dale Johannesen2008-01-181-0/+64
| | | | llvm-svn: 46174
* get symbolic information for ppc ldbl nodes.Chris Lattner2008-01-181-0/+5
| | | | llvm-svn: 46165
* Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:Chris Lattner2008-01-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | _test: fctiwz f0, f1 stfiwx f0, 0, r4 blr instead of: _test: fctiwz f0, f1 stfd f0, -8(r1) nop nop lwz r2, -4(r1) stb r2, 0(r4) blr The former is not correct (stores 4 bytes, not 1). llvm-svn: 46161
* This commit changes:Chris Lattner2008-01-171-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Legalize now always promotes truncstore of i1 to i8. 2. Remove patterns and gunk related to truncstore i1 from targets. 3. Rename the StoreXAction stuff to TruncStoreAction in TLI. 4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions. 5. Mark a wide variety of invalid truncstores as such in various targets, e.g. X86 currently doesn't support truncstore of any of its integer types. 6. Add legalize support for truncstores with invalid value input types. 7. Add a dag combine transform to turn store(truncate) into truncstore when safe. The later allows us to compile CodeGen/X86/storetrunc-fp.ll to: _foo: fldt 20(%esp) fldt 4(%esp) faddp %st(1) movl 36(%esp), %eax fstps (%eax) ret instead of: _foo: subl $4, %esp fldt 24(%esp) fldt 8(%esp) faddp %st(1) fstps (%esp) movl 40(%esp), %eax movss (%esp), %xmm0 movss %xmm0, (%eax) addl $4, %esp ret llvm-svn: 46140
* * Introduce a new SelectionDAG::getIntPtrConstant methodChris Lattner2008-01-171-3/+4
| | | | | | | | | | | | | and switch various codegen pieces and the X86 backend over to using it. * Add some comments to SelectionDAGNodes.h * Introduce a second argument to FP_ROUND, which indicates whether the FP_ROUND changes the value of its input. If not it is safe to xform things like fp_extend(fp_round(x)) -> x. llvm-svn: 46125
* Output sinl for a long double FSIN node, not sin.Duncan Sands2008-01-101-1/+3
| | | | | | | | Likewise fix up a bunch of other libcalls. While there I remove NEG_F32 and NEG_F64 since they are not used anywhere. This fixes 9 Ada ACATS failures. llvm-svn: 45833
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-18/+18
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Fix unintented change from last commitNicolas Geoffray2007-12-211-3/+3
| | | | llvm-svn: 45282
* Enable EH for linux/ppc32 targetsNicolas Geoffray2007-12-211-11/+9
| | | | llvm-svn: 45281
* implement __builtin_return_addr(0) on ppc.Chris Lattner2007-12-081-4/+32
| | | | llvm-svn: 44700
* Implement ExpandOperationResult for ppc i64 fp->int, which fixesChris Lattner2007-11-281-0/+9
| | | | | | | CodeGen/Generic/fp_to_int.ll among others. Its unclear why this just started failing... llvm-svn: 44407
* Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stackBill Wendling2007-11-131-2/+7
| | | | | | | | | | | adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If not, then there is the potential for the stack to be changed while the stack's being used by another instruction (like a call). This can only result in tears... llvm-svn: 44037
* Disable a couple more things for ppcf128.Dale Johannesen2007-10-231-2/+4
| | | | llvm-svn: 43267
* Use ptr type in the immediate field of a BxA instruction so we don't end up ↵Evan Cheng2007-10-221-1/+2
| | | | | | selecting 32-bit call instruction for ppc64. llvm-svn: 43228
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