| Commit message (Collapse) | Author | Age | Files | Lines |
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marked as legal.
llvm-svn: 22816
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Remove dead code in ISD::Constant handling
Add support for add long, imm16
We now codegen 'long long foo(long long a) { return ++a; }'
as:
addic r4, r4, 1
addze r3, r3
blr
instead of:
li r2, 1
li r5, 0
addc r2, r4, r2
adde r3, r3, r5
blr
llvm-svn: 22811
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llvm-svn: 22808
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fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
llvm-svn: 22805
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can be shared with the DAG->DAG selector.
llvm-svn: 22799
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llvm-svn: 22792
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consistent with gcc.
llvm-svn: 22791
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1. Not selecting the false value of a select_cc in the false arm, which
isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
Expander.
llvm-svn: 22789
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codegen for FP_TO_UINT by using the legalizer's SELECT variant.
Implement a codegen improvement for SELECT_CC, selecting the false node in
the MBB that feeds the phi node. This allows us to codegen:
void foo(int *a, int b, int c) { int d = (a < b) ? 5 : 9; *a = d; }
as:
_foo:
li r2, 5
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
li r2, 9
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
insted of:
_foo:
li r2, 5
li r5, 9
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r5, r5
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
llvm-svn: 22784
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zero.
llvm-svn: 22773
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(~x)|y and x|(~y) yielding ORC.
llvm-svn: 22771
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specified opcode and an integer constant right operand.
2. Modified ISD::SHL, ISD::SRL, ISD::SRA to use rlwinm when applied after a mask.
llvm-svn: 22761
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Patch by Jim Laskey.
llvm-svn: 22760
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(avoids an extra level of indirection in MakeReg).
defined MakeIntReg using RegMap->createVirtualRegister(PPC32::GPRCRegisterClass)
defined MakeFPReg using RegMap->createVirtualRegister(PPC32::FPRCRegisterClass)
s/MakeReg(MVT::i32)/MakeIntReg/
s/MakeReg(MVT::f64)/MakeFPReg/
Patch by Jim Laskey!
llvm-svn: 22759
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reflects what the hardware is capable of. This significantly simplifies
the CC handling logic throughout the ISel.
llvm-svn: 22756
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1. Clean up how SelectIntImmediateExpr handles use counts.
2. "Subtract from" was not clearing hi 16 bits.
Patch by Jim Laskey
llvm-svn: 22754
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Patch by Jim Laskey!
llvm-svn: 22750
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New routine: ISel::SelectIntImmediateExpr
2. Now checking use counts of large constants. If use count is > 2 then drop
thru so that the constant gets loaded into a register.
Source:
int %test1(int %a) {
entry:
%tmp.1 = add int %a, 123456789 ; <int> [#uses=1]
%tmp.2 = or int %tmp.1, 123456789 ; <int> [#uses=1]
%tmp.3 = xor int %tmp.2, 123456789 ; <int> [#uses=1]
%tmp.4 = sub int %tmp.3, -123456789 ; <int> [#uses=1]
ret int %tmp.4
}
Did Emit:
.machine ppc970
.text
.align 2
.globl _test1
_test1:
.LBB_test1_0: ; entry
addi r2, r3, -13035
addis r2, r2, 1884
ori r2, r2, 52501
oris r2, r2, 1883
xori r2, r2, 52501
xoris r2, r2, 1883
addi r2, r2, 52501
addis r3, r2, 1883
blr
Now Emits:
.machine ppc970
.text
.align 2
.globl _test1
_test1:
.LBB_test1_0: ; entry
lis r2, 1883
ori r2, r2, 52501
add r3, r3, r2
or r3, r3, r2
xor r3, r3, r2
add r3, r3, r2
blr
Patch by Jim Laskey!
llvm-svn: 22749
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llvm-svn: 22747
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llvm-svn: 22729
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llvm-svn: 22727
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llvm-svn: 22726
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code sequences.
llvm-svn: 22719
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Patch by Jim Laskey.
llvm-svn: 22716
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Patch by Jim Laskey!
llvm-svn: 22715
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way. This allows ORI/ORIS pairs, for example.
llvm-svn: 22714
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Includes wider support for rotate and mask cases.
Patch by Jim Laskey.
I've requested that Jim add new regression tests the newly handled cases.
llvm-svn: 22712
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Includes support for 32-bit constants using addi/addis.
Patch by Jim Laskey.
llvm-svn: 22711
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Patch by Jim Laskey
llvm-svn: 22710
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Patch by Jim Laskey
llvm-svn: 22709
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(lowercase isXXX).
Patch by Jim Laskey.
llvm-svn: 22708
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depending on the command line option. Now the command line option just
sets the subtarget as appropriate. G5 opts will now default to on on
G5-enabled nightly testers among other machines.
llvm-svn: 22688
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llvm-svn: 22619
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llvm-svn: 22617
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llvm-svn: 22595
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Patch contributed by Jim Laskey!
llvm-svn: 22594
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llvm-svn: 22588
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have to write arguments to the stack
llvm-svn: 22536
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llvm-svn: 22535
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For the following code:
double %ext(int %A.0__, long %A.1__) {
%A_addr = alloca %typedef.DComplex ; <%typedef.DComplex*> [#uses=2]
%tmp.1 = cast %typedef.DComplex* %A_addr to int* ; <int*> [#uses=1]
store int %A.0__, int* %tmp.1
%tmp.2 = getelementptr %typedef.DComplex* %A_addr, int 0, uint 1 ; <double*> [#uses=2]
%tmp.3 = cast double* %tmp.2 to long* ; <long*> [#uses=1]
store long %A.1__, long* %tmp.3
%tmp.5 = load double* %tmp.2 ; <double> [#uses=1]
ret double %tmp.5
}
We now generate:
_ext:
.LBB_ext_0: ;
stw r3, -12(r1)
stw r4, -8(r1)
stw r5, -4(r1)
lfd f1, -8(r1)
blr
Instead of:
_ext:
.LBB_ext_0: ;
stw r3, -12(r1)
addi r2, r1, -12
stw r4, 4(r2)
stw r5, 8(r2)
lfd f1, 4(r2)
blr
This also fires hundreds of times on MultiSource.
llvm-svn: 22533
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llvm-svn: 22530
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llvm-svn: 22523
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the need to build PIC.
llvm-svn: 22512
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llvm-svn: 22507
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Remove the LoadHiAddr pseudo-instruction.
Optimization of stores to and loads from statics.
Force JIT to use new non-PIC codepaths.
llvm-svn: 22494
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8-byte align doubles.
llvm-svn: 22486
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automatically generated from a target description.
llvm-svn: 22470
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This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).
llvm-svn: 22368
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llvm-svn: 22366
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1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
into any load/stores from the valist that are emitted
llvm-svn: 22339
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