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path: root/llvm/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp
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* Remove the PTX back-end and all of its artifacts (triple, etc.)Justin Holewinski2012-05-241-98/+0
| | | | | | | | This back-end was deprecated in favor of the NVPTX back-end. NV_CONTRIB llvm-svn: 157417
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ↵Craig Topper2012-04-021-1/+2
| | | | | | getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. llvm-svn: 153860
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-051-1/+2
| | | | | | | Used to allow context sensitive printing of super-register or sub-register references. llvm-svn: 152043
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-161-2/+3
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* PTX: Various stylistic and code readability changes recommended by Jim Grosbach.Justin Holewinski2011-09-301-3/+2
| | | | llvm-svn: 140855
* PTX: MC-ize the PTX back-end (patch 1 of N)Justin Holewinski2011-09-281-0/+14
| | | | | | | | Lay some groundwork for converting to MC-based asm printer. This is the first of probably many patches to bring the back-end back up-to-date with all of the recent MC changes. llvm-svn: 140697
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
| | | | | | These are strictly utilities for registering targets and components. llvm-svn: 138450
* Some refactoring so TargetRegistry.h no longer has to include any filesEvan Cheng2011-08-231-0/+1
| | | | | | from MC. llvm-svn: 138367
* createXXXMCCodeGenInfo should be static.Evan Cheng2011-07-231-2/+2
| | | | llvm-svn: 135826
* Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,Evan Cheng2011-07-221-23/+20
| | | | | | InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. llvm-svn: 135812
* - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-201-2/+3
| | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-191-0/+11
| | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-0/+12
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* Rename createAsmInfo to createMCAsmInfo and move registration code to ↵Evan Cheng2011-07-141-3/+9
| | | | | | MCTargetDesc to prepare for next round of changes. llvm-svn: 135219
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-0/+54
registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
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