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* Remove the PTX back-end and all of its artifacts (triple, etc.)Justin Holewinski2012-05-2453-6748/+0
| | | | | | | | This back-end was deprecated in favor of the NVPTX back-end. NV_CONTRIB llvm-svn: 157417
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-4/+4
| | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 llvm-svn: 155902
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-202-32/+26
| | | | | | since they are equivalent. llvm-svn: 155188
* Move getOpcodeName from the various target InstPrinters into the superclass ↵Benjamin Kramer2012-04-022-5/+0
| | | | | | | | MCInstPrinter. All implementations used the same code. llvm-svn: 153866
* Remove getInstructionName from MCInstPrinter implementations in favor of ↵Craig Topper2012-04-022-4/+2
| | | | | | using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ↵Craig Topper2012-04-023-4/+6
| | | | | | getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. llvm-svn: 153860
* Enable machine code verification in the entire code generator.Jakob Stoklund Olesen2012-03-281-2/+2
| | | | | | | | | | Some targets still mess up the liveness information, but that isn't verified after MRI->invalidateLiveness(). The verifier can still check other useful things like register classes and CFG, so it should be enabled after all passes. llvm-svn: 153615
* Prune some includesCraig Topper2012-03-271-1/+0
| | | | llvm-svn: 153502
* PTX: Fix predicate logic bugJustin Holewinski2012-03-242-21/+36
| | | | | | | | | | | | | | | | | | | | | | Code such as: %vreg100 = setcc %vreg10, -1, SETNE brcond %vreg10, %tgt was being incorrectly morphed into %vreg100 = and %vreg10, 1 brcond %vreg10, %tgt where the 'and' instruction could be eliminated since such logic is on 1-bit types in the PTX back-end, leaving us with just: brcond %vreg10, %tgt which essentially gives us inverted branch conditions. llvm-svn: 153364
* Move ftostr into its last user (cppbackend) and simplify it a bit.Benjamin Kramer2012-03-231-0/+1
| | | | | | New code should use raw_ostream. llvm-svn: 153326
* Remove some unnecessary forward declarations.Craig Topper2012-03-221-2/+0
| | | | llvm-svn: 153245
* fix a build failure with libc++Chris Lattner2012-03-191-0/+1
| | | | llvm-svn: 153063
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-179-12/+8
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-053-3/+6
| | | | | | | Used to allow context sensitive printing of super-register or sub-register references. llvm-svn: 152043
* Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper2012-03-041-2/+2
| | | | | | size of static data. llvm-svn: 151996
* Re-commit r151623 with fix. Only issue special no-return calls if it's a ↵Evan Cheng2012-02-282-4/+3
| | | | | | direct call. llvm-svn: 151645
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack ↵Daniel Dunbar2012-02-282-3/+4
| | | | | | prediction. ...", it is breaking the Clang build during the Compiler-RT part. llvm-svn: 151630
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-282-4/+3
| | | | | | | | | | | | | | | | | the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 llvm-svn: 151623
* Make all pointers to TargetRegisterClass const since they are all pointers ↵Craig Topper2012-02-221-18/+11
| | | | | | to static data that should not be modified. llvm-svn: 151134
* Clear virtual registers after they are no longer referenced.Andrew Trick2012-02-211-1/+3
| | | | | | | | | | | | | Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0. This makes sharing code for pre/postRA passes more robust. Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA(). To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs(). PEI resets virtual regs when it's done scavenging. PTX will either have to provide its own PEI pass or assign physregs. llvm-svn: 151032
* Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles2012-02-192-40/+3
| | | | llvm-svn: 150918
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-1824-25/+24
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Added TargetPassConfig::disablePass/substitutePass as a general mechanism to ↵Andrew Trick2012-02-151-4/+4
| | | | | | override specific passes. llvm-svn: 150562
* PTX no longer needs to provide its own backend.Andrew Trick2012-02-102-255/+21
| | | | llvm-svn: 150227
* RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-102-6/+3
| | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
* Codegen pass definition cleanup. No functionality.Andrew Trick2012-02-081-17/+17
| | | | | | | | | | | | | Moving toward a uniform style of pass definition to allow easier target configuration. Globally declare Pass ID. Globally declare pass initializer. Use INITIALIZE_PASS consistently. Add a call to the initializer from CodeGen.cpp. Remove redundant "createPass" functions and "getPassName" methods. While cleaning up declarations, cleaned up comments (sorry for large diff). llvm-svn: 150100
* Move pass configuration out of pass constructors: StackSlotColoring.Andrew Trick2012-02-081-1/+1
| | | | llvm-svn: 150097
* Move pass configuration out of pass constructors: PostRAScheduler.Andrew Trick2012-02-081-1/+1
| | | | llvm-svn: 150096
* Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick2012-02-081-1/+1
| | | | llvm-svn: 150095
* Added TargetPassConfig::setOptAndrew Trick2012-02-081-0/+2
| | | | llvm-svn: 150093
* Move pass configuration out of pass constructors: TailDuplicate::PreRegAllocAndrew Trick2012-02-081-2/+2
| | | | llvm-svn: 150091
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-2/+2
| | | | llvm-svn: 149961
* Add TargetPassConfig to the PassManager for use inside passesAndrew Trick2012-02-061-3/+5
| | | | llvm-svn: 149926
* TargetPassConfig: confine the MC configuration to TargetMachine.Andrew Trick2012-02-042-8/+12
| | | | | | | | | | Passes prior to instructon selection are now split into separate configurable stages. Header dependencies are simplified. The bulk of this diff is simply removal of the silly DisableVerify flags. Sorry for the target header churn. Attempting to stabilize them. llvm-svn: 149754
* Added TargetPassConfig. The first little step toward configuring codegen passes.Andrew Trick2012-02-032-43/+60
| | | | | | | | | | | Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. llvm-svn: 149672
* Better diagnostic for malformed .org assembly directive.Jim Grosbach2012-01-271-3/+3
| | | | | | Provide source line number information. llvm-svn: 149101
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-204-6/+1
| | | | llvm-svn: 148578
* Fix some leftover control reaches end of non-void function warnings.Benjamin Kramer2012-01-101-0/+1
| | | | llvm-svn: 147874
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-102-2/+0
| | | | llvm-svn: 147855
* Remove the logging streamer.Rafael Espindola2012-01-101-3/+0
| | | | llvm-svn: 147820
* Split Finish into Finish and FinishImpl to have a common place to do end ofRafael Espindola2012-01-071-2/+2
| | | | | | | | file error checking. Use that to error on an unfinished cfi_startproc. The error is not nice, but is already better than a segmentation fault. llvm-svn: 147717
* Clean up some Release build warnings.Benjamin Kramer2011-12-271-0/+2
| | | | llvm-svn: 147289
* Fix up the CMake build for the new files added in r146960, they'reChandler Carruth2011-12-201-0/+1
| | | | | | likely to stay either way that discussion ends up resolving itself. llvm-svn: 146966
* Unweaken vtables as per ↵David Blaikie2011-12-208-2/+29
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* LLVMBuild: Introduce a common section which currently has a list of theDaniel Dunbar2011-12-121-0/+3
| | | | | | | | | | | subdirectories to traverse into. - Originally I wanted to avoid this and just autoscan, but this has one key flaw in that new subdirectories can not automatically trigger a rerun of the llvm-build tool. This is particularly a pain when switching back and forth between trees where one has added a subdirectory, as the dependencies will tend to be wrong. This will also eliminates FIXME implicitly. llvm-svn: 146436
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-124-4/+0
| | | | llvm-svn: 146409
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-9/+6
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* First chunk of MachineInstr bundle support.Evan Cheng2011-12-061-1/+1
| | | | | | | | | 1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs llvm-svn: 145975
* PTX: Continue to fix up the register mess.Justin Holewinski2011-12-067-139/+260
| | | | llvm-svn: 145947
* PTX: Encode registers as unsigned values in the MC asm printer instead of ↵Justin Holewinski2011-12-064-14/+88
| | | | | | using external symbols llvm-svn: 145946
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