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* Fix "pointer is null" static analyzer warning. NFCI.Simon Pilgrim2020-01-151-2/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-144-4/+4
* [MC] Add parameter `Address` to MCInstrPrinter::printInstructionFangrui Song2020-01-062-2/+2
* [MC] Add parameter `Address` to MCInstPrinter::printInstFangrui Song2020-01-062-4/+5
* [NVPTX] Fixes -Wrange-loop-analysis warningsMark de Wever2019-12-221-1/+1
* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-116-1/+7
* [ARM] Teach the Arm cost model that a Shift can be folded into other instruct...David Green2019-12-092-2/+4
* [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"Tom Stellard2019-11-212-2/+2
* DAG: Add function context to isFMAFasterThanFMulAndFAddMatt Arsenault2019-11-191-1/+4
* [SVE][CodeGen] Scalable vector MVT size queriesGraham Hunter2019-11-181-2/+2
* Add missing includes needed to prune LLVMContext.h include, NFCReid Kleckner2019-11-141-0/+1
* Fix uninitialized variable warning. NFCI.Simon Pilgrim2019-11-131-1/+1
* Use MCRegister in copyPhysRegMatt Arsenault2019-11-112-3/+3
* ManagedStringPool - pre-increment iterator. NFC.Simon Pilgrim2019-11-071-1/+1
* [NVPTX] Added llvm.nvvm.mma.m8n8k4.* intrinsicsArtem Belevich2019-10-281-14/+28
* [Mips] Use appropriate private label prefix based on Mips ABIMirko Brkusanin2019-10-232-2/+4
* [Alignment][NFC] Attributes use Align/MaybeAlignGuillaume Chatelet2019-10-221-10/+8
* [Alignment][NFC] Use Align for TargetFrameLowering/SubtargetGuillaume Chatelet2019-10-171-1/+1
* [NVPTX] Restructure shfl instrinsics and add variants that return a predicate.Artem Belevich2019-10-142-111/+63
* [LegacyPassManager] Deprecate the BasicBlockPass/Manager.Alina Sbirlea2019-09-302-48/+51
* [Alignment][NFC] Remove AllocaInst::setAlignment(unsigned)Guillaume Chatelet2019-09-301-1/+1
* [TargetLowering] Make allowsMemoryAccess methode virtual.Thomas Raoux2019-09-261-4/+4
* [Alignment][NFC] DataLayout migration to llvm::AlignGuillaume Chatelet2019-09-231-1/+1
* [NVPTX] NVPTXLowerAggrCopies - Silence static analyzer dyn_cast<StoreInst> nu...Simon Pilgrim2019-09-221-1/+1
* NVPTXAsmPrinter - Don't dereference a dyn_cast result. NFCI.Simon Pilgrim2019-09-171-1/+1
* [SVE][MVT] Fixed-length vector MVT rangesGraham Hunter2019-09-171-1/+1
* DAG/GlobalISel: Correct type profile of bitcount opsMatt Arsenault2019-09-131-4/+4
* [LLVM][Alignment] Introduce Alignment In MachineFrameInfoGuillaume Chatelet2019-08-211-1/+1
* [AsmPrinter] Remove const qualifier from EmitBasicBlockStart.Karl-Johan Karlsson2019-08-202-2/+2
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-1/+1
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-1/+1
* Replace llvm::MutexGuard/UniqueLock with their standard equivalentsBenjamin Kramer2019-08-071-6/+7
* [LLVM][Alignment] Introduce Alignment TypeGuillaume Chatelet2019-08-051-21/+23
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-012-5/+5
* [NVPTX] Fix PR41651Michael Liao2019-07-301-2/+2
* Test commit. NFC.Bryant Wong2019-07-121-0/+1
* [NVPTX] Use atomicrmw fadd instead of intrinsicsBenjamin Kramer2019-07-113-21/+12
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-242-2/+2
* [TargetLowering] Add allowsMemoryAccess(MachineMemOperand) helper wrapper. NFCI.Simon Pilgrim2019-06-111-2/+2
* Revert CMake: Make most target symbols hidden by defaultTom Stellard2019-06-114-4/+4
* CMake: Make most target symbols hidden by defaultTom Stellard2019-06-104-4/+4
* Include what you use in NVPTX.hDmitri Gribenko2019-06-031-7/+2
* Include what you use in NVPTX.hDmitri Gribenko2019-06-037-2/+6
* [DebugInfoMetadata] Refactor DIExpression::prepend constants (NFC)Petar Jovanovic2019-05-201-2/+2
* [NVPTX] Create a TargetInfo header. NFCRichard Trieu2019-05-147-8/+25
* [NVPTX] Move InstPrinter files to MCTargetDesc. NFCRichard Trieu2019-05-1110-34/+9
* [AsmPrinter] refactor to support %c w/ GlobalAddress'Nick Desaulniers2019-04-261-1/+1
* [CUDA] Implemented _[bi]mma* builtins.Artem Belevich2019-04-251-0/+2
* PTX 6.3 extends `wmma` instruction to support s8/u8/s4/u4/b1 -> s32.Artem Belevich2019-04-253-54/+243
* [NVPTX] generate correct MMA instruction mnemonics with PTX63+.Artem Belevich2019-04-254-129/+170
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