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* Modify class ReadHardware and add definition of 64-bit version of instructionAkira Hatanaka2011-12-072-3/+6
| | | | | | RDHWR. llvm-svn: 146101
* Add newline.Akira Hatanaka2011-12-071-1/+2
| | | | llvm-svn: 146100
* Add 64-bit HWR29 register.Akira Hatanaka2011-12-071-0/+2
| | | | llvm-svn: 146099
* 32 to 64-bit anyext pattern.Akira Hatanaka2011-12-071-0/+4
| | | | llvm-svn: 146097
* 32 to 64-bit zext pattern.Akira Hatanaka2011-12-071-0/+5
| | | | llvm-svn: 146096
* Variable cleanup. Based on past patch submittals variable names haveBruno Cardoso Lopes2011-12-072-55/+60
| | | | | | | been normalized and more descriptive comments added. Patch by Reed Kotler and Jack Carter. llvm-svn: 146088
* 64-bit WrapperPICPat patterns.Akira Hatanaka2011-12-071-0/+6
| | | | llvm-svn: 146086
* Define base class for WrapperPICPat.Akira Hatanaka2011-12-071-7/+7
| | | | llvm-svn: 146081
* Modify LowerFCOPYSIGN to handle Mips64.Akira Hatanaka2011-12-071-14/+22
| | | | llvm-svn: 146080
* Fix comment.Akira Hatanaka2011-12-071-2/+1
| | | | llvm-svn: 146063
* Fix comment.Akira Hatanaka2011-12-071-1/+1
| | | | llvm-svn: 146062
* Fix 64-bit immediate patterns.Akira Hatanaka2011-12-073-6/+25
| | | | llvm-svn: 146059
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-073-12/+11
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* Add a few moreLocal/Global R_MIPS_GOT related fixups andBruno Cardoso Lopes2011-12-077-47/+46
| | | | | | | | make the addend fixup code a bit more generic Patch by Jack Carter. llvm-svn: 145998
* First chunk of MachineInstr bundle support.Evan Cheng2011-12-061-1/+1
| | | | | | | | | 1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs llvm-svn: 145975
* Use branches instead of jumps + variable cleanup. Testcase coming next. ↵Bruno Cardoso Lopes2011-12-063-41/+39
| | | | | | Patch by Jack Carter llvm-svn: 145912
* Add register HWR29 numbering. Patch by Jack CarterBruno Cardoso Lopes2011-12-062-0/+2
| | | | llvm-svn: 145910
* MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.NAKAMURA Takumi2011-12-061-0/+1
| | | | llvm-svn: 145894
* Move target-specific logic out of generic MCAssembler.Jim Grosbach2011-12-061-0/+10
| | | | | | | | Whether a fixup needs relaxation for the associated instruction is a target-specific function, as the FIXME indicated. Create a hook for that and use it. llvm-svn: 145881
* Add definitions of 64-bit extract and insert instrucions and makeAkira Hatanaka2011-12-052-12/+17
| | | | | | | PerformANDCombine and PerformOrCombine aware of them. Test cases are included too. llvm-svn: 145853
* Split ExtIns into two base classes and have instructions EXT and INS derive fromAkira Hatanaka2011-12-051-17/+21
| | | | | | them. llvm-svn: 145852
* Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 andAkira Hatanaka2011-12-051-20/+16
| | | | | | O32 with relocation-model=pic too. llvm-svn: 145850
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-023-32/+33
| | | | | | | | | | | | change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. llvm-svn: 145714
* Change names for MIPS "generic" processors defined in Mips.td to match what GNUAkira Hatanaka2011-11-292-4/+4
| | | | | | | | | | tools use. Patch by Simon Atanasyan. "mips32r1" => "mips32" "4ke" => mips32r2" "mips64r1" => "mips64" llvm-svn: 145451
* build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-294-31/+0
| | | | llvm-svn: 145420
* This patch makes the following changes necessary for MIPS' direct code emission.Akira Hatanaka2011-11-236-55/+236
| | | | | | | | - lower unaligned loads/stores. - encode the size operand of instructions INS and EXT. - emit relocation information needed for JAL (jump-and-link). llvm-svn: 145113
* This patch addresses gp relative fixups/relocations for jump tables.Akira Hatanaka2011-11-231-1/+7
| | | | llvm-svn: 145112
* Lower 64-bit constant pool node.Akira Hatanaka2011-11-161-8/+12
| | | | llvm-svn: 144849
* Lower 64-bit block address.Akira Hatanaka2011-11-161-9/+11
| | | | llvm-svn: 144847
* Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpoolAkira Hatanaka2011-11-162-7/+24
| | | | | | nodes. llvm-svn: 144841
* 64-bit jump register instruction.Akira Hatanaka2011-11-162-6/+7
| | | | llvm-svn: 144840
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-163-29/+35
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bitAkira Hatanaka2011-11-152-18/+24
| | | | | | registers and instructions when ABI is N64. llvm-svn: 144666
* Set nomacro before emitting the sequence of instructions that set global pointerAkira Hatanaka2011-11-151-3/+2
| | | | | | register. llvm-svn: 144665
* Simplify function PassByValArg64.Akira Hatanaka2011-11-151-14/+18
| | | | llvm-svn: 144664
* Delete files.Akira Hatanaka2011-11-152-137/+0
| | | | llvm-svn: 144655
* Remove MipsMCSymbolRefExpr.Akira Hatanaka2011-11-152-2/+0
| | | | llvm-svn: 144654
* Unbreak Release builds.Benjamin Kramer2011-11-141-1/+1
| | | | llvm-svn: 144560
* 32-to-64-bit extended load.Akira Hatanaka2011-11-141-5/+10
| | | | llvm-svn: 144554
* AnalyzeCallOperands function for N32/64.Akira Hatanaka2011-11-142-0/+45
| | | | | | | | N32/64 places all variable arguments in integer registers (or on stack), regardless of their types, but follows calling convention of non-vaarg function when it handles fixed arguments. llvm-svn: 144553
* Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64.Akira Hatanaka2011-11-141-14/+30
| | | | llvm-svn: 144552
* Remove variable that keeps the size of area used to save byval or variableAkira Hatanaka2011-11-143-12/+1
| | | | | | | | | | | argument registers on the callee's stack frame, along with functions that set and get it. It is not necessary to add the size of this area when computing stack size in emitPrologue, since it has already been accounted for in PEI::calculateFrameObjectOffsets. llvm-svn: 144549
* Fix typo.Akira Hatanaka2011-11-121-1/+1
| | | | llvm-svn: 144453
* Implement Mips64's handling of byval arguments in LowerCall.Akira Hatanaka2011-11-121-12/+100
| | | | llvm-svn: 144452
* Implement Mips64's handling of byval arguments in LowerFormalArguments.Akira Hatanaka2011-11-121-18/+60
| | | | llvm-svn: 144449
* 64-bit arbitrary immediate pattern.Akira Hatanaka2011-11-121-0/+4
| | | | llvm-svn: 144448
* Function for handling byval arguments.Akira Hatanaka2011-11-122-4/+43
| | | | llvm-svn: 144447
* build: Attempt to rectify inconsistencies between CMake and LLVMBuild ↵Daniel Dunbar2011-11-121-1/+1
| | | | | | | | versions of explicit dependencies. - The hope is that we have a tool/test to verify these are accurate (and tight) soon. llvm-svn: 144444
* CMake: Fix CMake build for new Mips tblgen file.Daniel Dunbar2011-11-111-0/+1
| | | | llvm-svn: 144423
* Mips MC object code emission improvements:Bruno Cardoso Lopes2011-11-1113-130/+475
| | | | | | | | | | "With this patch we can now generate runnable Mips code through LLVM direct object emission. We have run numerous simple programs, both C and C++ and with -O0 and -O3 from the output. The code is not production ready, but quite useful for experimentation." Patch and message by Jack Carter llvm-svn: 144414
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