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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-07 23:14:41 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-07 23:14:41 +0000 |
| commit | ae378af6670660395de018c271d192fd66914eb8 (patch) | |
| tree | d5028d349c92ab269ec22e9a0f55c108fd5b7dae /llvm/lib/Target/Mips | |
| parent | 90d961250bea9536c3610d4bbd364448ec8ebdd7 (diff) | |
| download | bcm5719-llvm-ae378af6670660395de018c271d192fd66914eb8.tar.gz bcm5719-llvm-ae378af6670660395de018c271d192fd66914eb8.zip | |
32 to 64-bit zext pattern.
llvm-svn: 146096
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/Mips64InstrInfo.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index bc9c5602cad..91c91022fd8 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -222,6 +222,9 @@ def DynAlloc64 : EffectiveAddress<"daddiu\t$rt, $addr", CPU64Regs, mem_ea_64>, def DEXT : ExtBase<3, "dext", CPU64Regs>; def DINS : InsBase<7, "dins", CPU64Regs>; +def DSLL64_32 : FR<0x3c, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt), + "dsll32\t$rd, $rt, 0", [], IIAlu>; + //===----------------------------------------------------------------------===// // Arbitrary patterns that map to one or more instructions //===----------------------------------------------------------------------===// @@ -296,3 +299,5 @@ def : Pat<(MipsDynAlloc addr:$f), (DynAlloc64 addr:$f)>, Requires<[IsN64]>; def : Pat<(i32 (trunc CPU64Regs:$src)), (SLL (EXTRACT_SUBREG CPU64Regs:$src, sub_32), 0)>, Requires<[IsN64]>; +// 32-to-64-bit extension +def : Pat<(i64 (zext CPURegs:$src)), (DSRL32 (DSLL64_32 CPURegs:$src), 0)>; |
