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path: root/llvm/lib/Target/Mips/MipsSubtarget.h
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* [mips] Add preliminary support for the MIPS II target.Vasileios Kalintiris2014-11-111-0/+1
* [mips] Replace MipsABIEnum with a MipsABIInfo class.Daniel Sanders2014-10-241-14/+8
* constify the TargetMachine being passed through the Mips subtargetEric Christopher2014-09-191-2/+3
* [mips] Remove inverted predicates from MipsSubtarget that were only used by M...Daniel Sanders2014-09-101-3/+0
* [mips] Move MipsTargetLowering::MipsCC::regSize() to MipsSubtarget::getGPRSiz...Daniel Sanders2014-09-091-0/+1
* Reinstate "Nuke the old JIT."Eric Christopher2014-09-021-3/+0
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* [mips] Invert the abicalls feature bit to be noabicalls so that it's possible...Daniel Sanders2014-08-081-3/+3
* [mips] Initial implementation of -mabicalls/-mno-abicalls.Daniel Sanders2014-08-081-0/+4
* Temporarily Revert "Nuke the old JIT." as it's not quite ready toEric Christopher2014-08-071-0/+3
* Nuke the old JIT.Rafael Espindola2014-08-071-3/+0
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-8/+14
* [mips] Don't use odd-numbered single precision registers for fastcc callingSasa Stankovic2014-07-291-0/+1
* Fundamentally change the MipsSubtarget replacement machinery:Eric Christopher2014-07-181-20/+1
* Avoid caching the relocation model on the subtarget, this is forEric Christopher2014-07-181-6/+2
* Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachineEric Christopher2014-07-181-1/+5
* Move Post RA Scheduling flag bit into SchedMachineModelSanjay Patel2014-07-151-3/+4
* [mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI isSasa Stankovic2014-07-141-1/+2
* [mips] Added FPXX modeless calling convention.Zoran Jovanovic2014-07-101-0/+4
* [mips] Add support for -modd-spreg/-mno-odd-spregDaniel Sanders2014-07-101-0/+5
* Mips.abiflags is a new implicitly generated section that will be present on ...Vladimir Medic2014-07-081-0/+4
* Move subtarget dependent features into the subtarget from the targetEric Christopher2014-07-031-1/+26
* Move the data layout and selection dag info from the mips target machineEric Christopher2014-07-021-0/+7
* Break out subtarget initialization that dependent variables need intoEric Christopher2014-07-021-0/+2
* Move MipsJITInfo to the subtarget rather than the target machine.Eric Christopher2014-07-021-0/+5
* [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6Daniel Sanders2014-06-161-1/+4
* [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.Daniel Sanders2014-06-161-1/+1
* [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ...Daniel Sanders2014-06-121-5/+10
* [mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6Daniel Sanders2014-05-231-1/+6
* [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu...Daniel Sanders2014-05-131-0/+3
* [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m...Daniel Sanders2014-05-121-0/+3
* [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64Daniel Sanders2014-05-121-4/+0
* [mips] Fold FeatureSEInReg into FeatureMips32r2Daniel Sanders2014-05-121-4/+0
* [mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2Daniel Sanders2014-05-121-4/+0
* [mips] Replace FeatureFPIdx with FeatureMips4_32r2Daniel Sanders2014-05-121-5/+5
* [mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=...Daniel Sanders2014-05-091-0/+4
* [mips] Remove unused CondMov feature bitDaniel Sanders2014-05-091-4/+0
* [mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu...Daniel Sanders2014-05-091-0/+4
* [mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6Daniel Sanders2014-05-091-2/+7
* [mips] Marked up instructions added in MIPS-II and tested that IAS for -mcpu=...Daniel Sanders2014-05-081-0/+1
* [mips] Add highly experimental support for MIPS-I, MIPS-II, MIPS-III, and MIPS-VDaniel Sanders2014-05-071-1/+2
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-291-3/+3
* [mips] Add initial support for NaN2008 in the back-end.Matheus Almeida2014-04-161-0/+4
* [mips] IndentationDaniel Sanders2014-04-161-4/+3
* [mips] Add initial (experimental) MIPS-IV support.Daniel Sanders2014-04-031-4/+1
* [MIPS] Add cpu octeon and some instructionsKai Nacke2014-03-201-0/+5
* [mips] Forbid the use of registers t6, t7 and t8 if the target is NaCl.Sasa Stankovic2014-02-071-0/+1
* [mips] Add NaCl target and forbid indexed loads and stores for itPetar Jovanovic2014-02-051-0/+3
* Remove another hasRawTextSupport.Rafael Espindola2014-01-311-7/+0
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+0
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