diff options
| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-12 12:52:44 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-12 12:52:44 +0000 |
| commit | 07cdea2baa0f92900abe887f711aa263edc14fb3 (patch) | |
| tree | 095d81cff7c84dda5da4659a0bc32853360397b6 /llvm/lib/Target/Mips/MipsSubtarget.h | |
| parent | 118d469660ae79e0ea0e538e08cfeca32fa1eeb7 (diff) | |
| download | bcm5719-llvm-07cdea2baa0f92900abe887f711aa263edc14fb3.tar.gz bcm5719-llvm-07cdea2baa0f92900abe887f711aa263edc14fb3.zip | |
[mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=mips[1234] does not accept them
Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-V that was available in MIPS32R2
Most of these instructions are correctly rejected but with the wrong error
message. These have been placed in a separate test for now. It happens
because many of the MIPS V instructions have not been implemented.
Depends on D3694
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3695
llvm-svn: 208546
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h index 2da92e61670..135dfec2e00 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.h +++ b/llvm/lib/Target/Mips/MipsSubtarget.h @@ -88,6 +88,9 @@ protected: // HasMips4_32r2 - Has the subset of MIPS-IV present in MIPS32r2 bool HasMips4_32r2; + // HasMips5_32r2 - Has the subset of MIPS-V present in MIPS32r2 + bool HasMips5_32r2; + // InMips16 -- can process Mips16 instructions bool InMips16Mode; |
