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path: root/llvm/lib/Target/Mips/MipsSubtarget.h
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* [mips] Added support for the ERETNC instruction.Vasileios Kalintiris2015-07-201-1/+1
* Remove getDataLayout() from TargetSelectionDAGInfo (had no users)Mehdi Amini2015-07-091-3/+3
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRASched...Matthias Braun2015-06-131-1/+1
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MC...Daniel Sanders2015-06-101-3/+2
* InMips16HardFloat was only being set conditional on whether orEric Christopher2015-05-071-1/+1
* Rename the MIPS routine abiUsesSoftFloat -> useSoftFloat to matchEric Christopher2015-05-071-3/+1
* [mips] Add the SoftFloat MipsSubtarget feature.Toma Tabacu2015-05-071-1/+6
* [mips][microMIPSr6] Implement initial subtarget supportJozef Kolek2015-04-201-0/+1
* [mips] Add backend support for Mips32r[35] and Mips64r[35].Daniel Sanders2015-02-181-2/+12
* [mips] Make MipsSubtarget::hasMips*() functions consistent. NFC.Daniel Sanders2015-02-041-11/+10
* Move DataLayout back to the TargetMachine from TargetSubtargetInfoEric Christopher2015-01-261-2/+0
* Move the Mips target to storing the ABI in the TargetMachine ratherEric Christopher2015-01-261-8/+5
* [mips] Remove a redundant semicolon and add space before curly brackets. NFC.Toma Tabacu2015-01-161-2/+2
* [cleanup] Re-sort all the #include lines in LLVM usingChandler Carruth2015-01-141-1/+1
* Make the TargetMachine in MipsSubtarget a reference ratherEric Christopher2015-01-081-3/+3
* Remove unused variable, initializer, and accessor.Eric Christopher2014-12-191-1/+0
* MipsABIInfo class is used in different libraries. Moving the files to MCTarge...Vladimir Medic2014-12-171-1/+1
* [mips] Add preliminary support for the MIPS II target.Vasileios Kalintiris2014-11-111-0/+1
* [mips] Replace MipsABIEnum with a MipsABIInfo class.Daniel Sanders2014-10-241-14/+8
* constify the TargetMachine being passed through the Mips subtargetEric Christopher2014-09-191-2/+3
* [mips] Remove inverted predicates from MipsSubtarget that were only used by M...Daniel Sanders2014-09-101-3/+0
* [mips] Move MipsTargetLowering::MipsCC::regSize() to MipsSubtarget::getGPRSiz...Daniel Sanders2014-09-091-0/+1
* Reinstate "Nuke the old JIT."Eric Christopher2014-09-021-3/+0
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* [mips] Invert the abicalls feature bit to be noabicalls so that it's possible...Daniel Sanders2014-08-081-3/+3
* [mips] Initial implementation of -mabicalls/-mno-abicalls.Daniel Sanders2014-08-081-0/+4
* Temporarily Revert "Nuke the old JIT." as it's not quite ready toEric Christopher2014-08-071-0/+3
* Nuke the old JIT.Rafael Espindola2014-08-071-3/+0
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-8/+14
* [mips] Don't use odd-numbered single precision registers for fastcc callingSasa Stankovic2014-07-291-0/+1
* Fundamentally change the MipsSubtarget replacement machinery:Eric Christopher2014-07-181-20/+1
* Avoid caching the relocation model on the subtarget, this is forEric Christopher2014-07-181-6/+2
* Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachineEric Christopher2014-07-181-1/+5
* Move Post RA Scheduling flag bit into SchedMachineModelSanjay Patel2014-07-151-3/+4
* [mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI isSasa Stankovic2014-07-141-1/+2
* [mips] Added FPXX modeless calling convention.Zoran Jovanovic2014-07-101-0/+4
* [mips] Add support for -modd-spreg/-mno-odd-spregDaniel Sanders2014-07-101-0/+5
* Mips.abiflags is a new implicitly generated section that will be present on ...Vladimir Medic2014-07-081-0/+4
* Move subtarget dependent features into the subtarget from the targetEric Christopher2014-07-031-1/+26
* Move the data layout and selection dag info from the mips target machineEric Christopher2014-07-021-0/+7
* Break out subtarget initialization that dependent variables need intoEric Christopher2014-07-021-0/+2
* Move MipsJITInfo to the subtarget rather than the target machine.Eric Christopher2014-07-021-0/+5
* [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6Daniel Sanders2014-06-161-1/+4
* [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.Daniel Sanders2014-06-161-1/+1
* [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ...Daniel Sanders2014-06-121-5/+10
* [mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6Daniel Sanders2014-05-231-1/+6
* [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu...Daniel Sanders2014-05-131-0/+3
* [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m...Daniel Sanders2014-05-121-0/+3
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