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path: root/llvm/lib/Target/Hexagon/HexagonSubtarget.h
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* [Target] Fix some Clang-tidy modernize-use-using and Include What You Use war...Eugene Zelenko2017-06-191-4/+18
* [Hexagon] Disable predicated calls by defaultKrzysztof Parzyszek2017-05-051-0/+1
* [Hexagon] Use automatically-generated scheduling information for HVXKrzysztof Parzyszek2017-05-031-5/+4
* [Hexagon] Introduce Hexagon V62Krzysztof Parzyszek2017-02-101-0/+3
* [Hexagon] Replace instruction definitions with auto-generated onesKrzysztof Parzyszek2017-02-101-3/+1
* [Hexagon] Add DAG mutations for machine pipelinerKrzysztof Parzyszek2016-12-221-0/+4
* [Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFCKrzysztof Parzyszek2016-07-291-2/+2
* [Hexagon] Add target feature to generate long callsKrzysztof Parzyszek2016-07-251-0/+2
* [Hexagon] Use loop data prefetch on HexagonKrzysztof Parzyszek2016-07-221-0/+3
* [Hexagon] Fix zero latency instructions with multiple predecessorsKrzysztof Parzyszek2016-07-181-2/+6
* [Hexagon] Handle instruction latency for 0 or 2 cyclesKrzysztof Parzyszek2016-07-151-0/+10
* [Hexagon] Add a scheduling DAG mutationKrzysztof Parzyszek2016-07-151-1/+9
* [Hexagon] Add option to enable subregister liveness trackingKrzysztof Parzyszek2016-05-281-0/+2
* [Hexagon] Enable the post-RA schedulerKrzysztof Parzyszek2016-05-261-0/+1
* [Hexagon] Select the aggressive anti-dependency breakerKrzysztof Parzyszek2016-05-261-0/+2
* [Hexagon] Subtarget features/default CPU correctionsKrzysztof Parzyszek2015-12-141-1/+1
* Add hexagonv55 and hexagonv60 as recognized CPUs, make v60 the defaultKrzysztof Parzyszek2015-11-251-1/+5
* [Hexagon] Bring HexagonInstrInfo up to dateKrzysztof Parzyszek2015-11-241-0/+6
* [Hexagon] Adding skeleton of HVX extension instructions.Colin LeMahieu2015-10-171-2/+6
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MC...Daniel Sanders2015-06-101-1/+1
* Remove useMachineScheduler and replace it with subtarget optionsEric Christopher2015-03-111-0/+5
* [Hexagon] Removing more V4 predicates since V4 is the required minimum.Colin LeMahieu2015-02-091-13/+6
* Move DataLayout back to the TargetMachine from TargetSubtargetInfoEric Christopher2015-01-261-2/+0
* [cleanup] Re-sort all the #include lines in LLVM usingChandler Carruth2015-01-141-1/+1
* Add override to overriden virtual methods, remove virtual keywords.Benjamin Kramer2014-09-031-6/+10
* Fix typos in commentsRobin Morisset2014-08-151-1/+1
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-2/+4
* Move all of the hexagon subtarget dependent variables from the targetEric Christopher2014-06-271-1/+26
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-1/+1
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-1/+0
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+1
* Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth2012-12-041-1/+1
* Hexagon V5 FP Support.Sirish Pande2012-05-101-1/+7
* Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth2012-04-231-7/+1
* Hexagon V5 (floating point) support.Sirish Pande2012-04-231-1/+7
* This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth2012-04-181-7/+1
* Hexagon V5 (Floating Point) Support.Sirish Pande2012-04-161-1/+7
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Hexagon backend supportTony Linthicum2011-12-121-0/+74
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