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path: root/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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* Finish renaming remaining analyzeBranch functionsMatt Arsenault2016-09-141-5/+5
* Make analyzeBranch family of instruction names consistentMatt Arsenault2016-09-141-3/+3
* AArch64: Use TTI branch functions in branch relaxationMatt Arsenault2016-09-141-2/+7
* CodeGen: Give MachineBasicBlock::reverse_iterator a handle to the current MIDuncan P. N. Exon Smith2016-09-111-1/+1
* Make sure to maintain register liveness when generating predicated instructions.Ron Lieberman2016-09-021-22/+56
* [Hexagon] Fix subesthetic indentationKrzysztof Parzyszek2016-08-191-3/+3
* [Hexagon] Fix a few omissions in HexagonInstrInfoKrzysztof Parzyszek2016-08-191-0/+3
* [Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumprKrzysztof Parzyszek2016-08-191-0/+19
* Hexagon: Avoid dereferencing end() in HexagonInstrInfo::InsertBranchDuncan P. N. Exon Smith2016-08-171-7/+5
* [Hexagon] Standardize next batch of pseudo instructionsKrzysztof Parzyszek2016-08-161-9/+10
* [Hexagon] Clean up some miscellaneous V60 intrinsics a bitKrzysztof Parzyszek2016-08-161-8/+10
* [Hexagon] Standardize vector predicate load/store pseudo instructionsKrzysztof Parzyszek2016-08-161-20/+12
* [Hexagon] Cleanup and standardize vector load/store pseudo instructionsKrzysztof Parzyszek2016-08-121-81/+68
* [Hexagon] Standardize pseudo-instructions for calls and returnsKrzysztof Parzyszek2016-08-121-11/+11
* [Hexagon] Treat non-returning indirect calls as scheduling boundariesKrzysztof Parzyszek2016-08-121-4/+3
* [Hexagon] Allow non-returning calls in hardware loopsKrzysztof Parzyszek2016-08-111-0/+6
* [Hexagon] Standardize "select" pseudo-instructionsKrzysztof Parzyszek2016-08-111-3/+5
* [Hexagon] Use integer instructions for floating point immediatesKrzysztof Parzyszek2016-08-101-23/+1
* Replace MachineInstr* with MachineInstr& in TargetInstrInfo, NFCKrzysztof Parzyszek2016-08-011-19/+19
* [Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFCKrzysztof Parzyszek2016-07-291-403/+379
* MachinePipeliner pass that implements Swing Modulo SchedulingBrendon Cahoon2016-07-291-0/+107
* [Hexagon] Implement DFA based hazard recognizerKrzysztof Parzyszek2016-07-291-3/+10
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-2/+2
* [Hexagon] Handle instruction latency for 0 or 2 cyclesKrzysztof Parzyszek2016-07-151-0/+32
* [Hexagon] Improve patterns with stack-based addressingKrzysztof Parzyszek2016-07-151-11/+15
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-151-2/+2
* [Hexagon] Packetize function call arguments with tail call instructionsKrzysztof Parzyszek2016-07-141-0/+11
* Target: Avoid getFirstTerminator() => pointer, NFCDuncan P. N. Exon Smith2016-07-081-1/+1
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-393/+411
* [Hexagon] Fix/simplify some conditional statementsKrzysztof Parzyszek2016-06-151-3/+3
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-6/+7
* [Hexagon] Remove incorrect offset scalingKrzysztof Parzyszek2016-06-101-4/+2
* [Hexagon] Expand COPY pseudo-instructionKrzysztof Parzyszek2016-06-021-6/+11
* [Hexagon] Simplify HexagonInstrInfo::isPredicableKrzysztof Parzyszek2016-05-161-84/+5
* [Hexagon] Expand VSelect pseudo instructionsKrzysztof Parzyszek2016-05-121-0/+38
* [scan-build] fix warnings emitted on LLVM Hexagon code baseKrzysztof Parzyszek2016-05-051-1/+1
* [Hexagon] Fix the offset ranges for vector memory instructionsKrzysztof Parzyszek2016-05-051-8/+8
* [Hexagon] Optimize addressing modes for load/storeKrzysztof Parzyszek2016-04-291-0/+26
* [Hexagon] Generate PIC-specific versions of save/restore routinesKrzysztof Parzyszek2016-03-241-1/+3
* WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFCDuncan P. N. Exon Smith2016-02-271-1/+1
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-60/+57
* CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...Duncan P. N. Exon Smith2016-02-221-1/+1
* Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"Duncan P. N. Exon Smith2016-02-221-3/+3
* CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFCDuncan P. N. Exon Smith2016-02-211-2/+2
* [Hexagon] Recognize more cases in copyPhysReg and stack slot load/storeKrzysztof Parzyszek2016-02-121-51/+105
* [Hexagon] Recognize more instructions in isLoadFromStackSlot/isStoreToStackSlotKrzysztof Parzyszek2016-02-121-19/+99
* [Hexagon] Add utility functions to detect sign- and zero-extending loadsKrzysztof Parzyszek2016-02-121-1/+159
* [Hexagon] Use general purpose registers to spill pred/mod registers intoKrzysztof Parzyszek2016-01-221-6/+15
* [Hexagon] Expand pseudo instruction Insert4Krzysztof Parzyszek2016-01-141-0/+30
* [Hexagon] Handle branches with non-mbb operandsKrzysztof Parzyszek2016-01-141-0/+5
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