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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
root
/
llvm
/
lib
/
Target
/
Hexagon
/
HexagonHardwareLoops.cpp
Commit message (
Expand
)
Author
Age
Files
Lines
*
Hexagon: Use multiclass for Jump instructions.
Jyotsna Verma
2013-05-01
1
-2
/
+2
*
Hexagon: Remove assembler mapped instruction definitions.
Jyotsna Verma
2013-04-23
1
-6
/
+0
*
Remove unused typedef.
Duncan Sands
2013-04-01
1
-1
/
+0
*
Switch to LLVM support function abs64 to keep VS2008 happy.
Tim Northover
2013-03-27
1
-1
/
+1
*
Extend Hexagon hardware loop generation to handle various additional cases:
Krzysztof Parzyszek
2013-02-11
1
-382
/
+1283
*
Move all of the header files which are involved in modelling the LLVM IR
Chandler Carruth
2013-01-02
1
-1
/
+1
*
In hexagon convertToHardwareLoop, don't deref end() iterator
Matthew Curtis
2012-12-07
1
-7
/
+14
*
Use the new script to sort the includes of every file under lib.
Chandler Carruth
2012-12-03
1
-3
/
+3
*
Don't use getNextOperandForReg().
Jakob Stoklund Olesen
2012-08-08
1
-1
/
+4
*
Fix typos found by http://github.com/lyda/misspell-check
Benjamin Kramer
2012-06-02
1
-1
/
+1
*
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...
Craig Topper
2012-04-20
1
-1
/
+1
*
Reorder includes in Target backends to following coding standards. Remove som...
Craig Topper
2012-03-17
1
-2
/
+2
*
Optimize redundant sign extends and negation of predicates.
Sirish Pande
2012-02-15
1
-2
/
+2
*
Revert "Optimize redundant sign extends and negation of predicates"
Eric Christopher
2012-02-15
1
-2
/
+2
*
Optimize redundant sign extends and negation of predicates
Sirish Pande
2012-02-15
1
-2
/
+2
*
Hexagon backend support
Tony Linthicum
2011-12-12
1
-0
/
+644