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path: root/llvm/lib/Target/CellSPU/SPUTargetAsmInfo.cpp
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* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-221-40/+0
| | | | llvm-svn: 79763
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-1/+1
| | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. llvm-svn: 78802
* Change the asmprinter to print the comment character before theChris Lattner2009-08-111-2/+0
| | | | | | | | | | "inlineasmstart/end" strings so that the contents of the directive are separate from the comment character. This lets elf targets get #APP/#NOAPP for free even if they don't use "#" as the comment character. This also allows hoisting the darwin stuff up to the shared TAI class. llvm-svn: 78737
* SjLj based exception handling unwinding support. This patch is nasty, brutishJim Grosbach2009-08-111-1/+1
| | | | | | | | | | | | | and short. Well, it's kinda short. Definitely nasty and brutish. The front-end generates the register/unregister calls into the SjLj runtime, call-site indices and landing pad dispatch. The back end fills in the LSDA with the call-site information provided by the front end. Catch blocks are not yet implemented. Built on Darwin and verified no llvm-core "make check" regressions. llvm-svn: 78625
* move dwarf debug info section selection stuff from TAI toChris Lattner2009-08-021-11/+0
| | | | | | TLOF, unifying all the dwarf targets at the same time. llvm-svn: 77889
* simplify SPULinuxTargetAsmInfo, remove use of TM.Chris Lattner2009-08-021-11/+9
| | | | llvm-svn: 77869
* remove TargetAsmInfo::TM, which is now dead. The basic TAI class now Chris Lattner2009-08-021-1/+1
| | | | | | no longer depends on TM! llvm-svn: 77863
* REmove dead fields of TAI.Chris Lattner2009-08-011-2/+0
| | | | llvm-svn: 77820
* remove a pointless override.Chris Lattner2009-07-311-10/+0
| | | | llvm-svn: 77723
* Rip all of the global variable lowering logic out of TargetAsmInfo. SinceChris Lattner2009-07-281-4/+0
| | | | | | | | | | | | | | | | | | | | it is highly specific to the object file that will be generated in the end, this introduces a new TargetLoweringObjectFile interface that is implemented for each of ELF/MachO/COFF/Alpha/PIC16 and XCore. Though still is still a brutal and ugly refactoring, this is a major step towards goodness. This patch also: 1. fixes a bunch of dangling pointer problems in the PIC16 backend. 2. disables the TargetLowering copy ctor which PIC16 was accidentally using. 3. gets us closer to xcore having its own crazy target section flags and pic16 not having to shadow sections with its own objects. 4. fixes wierdness where ELF targets would set CStringSection but not CStringSection_. Factor the code better. 5. fixes some bugs in string lowering on ELF targets. llvm-svn: 77294
* Eliminate getNamed/getUnnamedSection, adding a new and unified ↵Chris Lattner2009-07-271-1/+1
| | | | | | | | getOrCreateSection instead. llvm-svn: 77186
* Eliminate SectionFlags, just embed a SectionKind into SectionChris Lattner2009-07-271-2/+1
| | | | | | instead and drive things based off of that. llvm-svn: 77184
* untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create aChris Lattner2009-07-261-2/+1
| | | | | | | | | 'unnamed' bss section, but some impls would want a named one. Since they don't have consistent behavior, just make each target do their own thing, instead of doing something "sortof common" then having targets change immutable objects later. llvm-svn: 77165
* this is (unfortunately) several changes mixed together:Chris Lattner2009-07-251-1/+1
| | | | | | | | | | | | | | 1. Spell SectionFlags::Writeable as "Writable". 2. Add predicates for deriving SectionFlags from SectionKinds. 3. Sink ELF-specific getSectionPrefixForUniqueGlobal impl into ELFTargetAsmInfo. 4. Fix SectionFlagsForGlobal to know that BSS/ThreadBSS has the BSS bit set (the real fix for PR4619). 5. Fix isSuitableForBSS to not put globals with explicit sections set in BSS (which was the reason #4 wasn't fixed earlier). 6. Remove my previous hack for PR4619. llvm-svn: 77085
* simplify macro debug info directive handling.Chris Lattner2009-06-181-2/+1
| | | | llvm-svn: 73736
* CellSPU:Scott Michel2009-01-261-0/+24
| | | | | | - Update DWARF debugging support. llvm-svn: 63059
* - Remove Tilmann's custom truncate lowering: it completely hosed overScott Michel2008-12-271-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | DAGcombine's ability to find reasons to remove truncates when they were not needed. Consequently, the CellSPU backend would produce correct, but _really slow and horrible_, code. Replaced with instruction sequences that do the equivalent truncation in SPUInstrInfo.td. - Re-examine how unaligned loads and stores work. Generated unaligned load code has been tested on the CellSPU hardware; see the i32operations.c and i64operations.c in CodeGen/CellSPU/useful-harnesses. (While they may be toy test code, it does prove that some real world code does compile correctly.) - Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc fault because i64 ult is not yet implemented.) - Added i64 eq and neq for setcc and select/setcc; started new instruction information file for them in SPU64InstrInfo.td. Additional i64 operations should be added to this file and not to SPUInstrInfo.td. llvm-svn: 61447
* CellSPU: Bring SPU's assembly printer more in-line with current LLVM codeScott Michel2008-11-081-1/+2
| | | | | | structure. Assembly printer now outputs the correct section for strings. llvm-svn: 58921
* CellSPU: Ensure that C strings are always put in the .rodata sectionScott Michel2008-11-071-0/+1
| | | | llvm-svn: 58839
* Teach CellSPU about ELF sections and new section emitter classes.Scott Michel2008-11-071-28/+18
| | | | | NB: This is likely to need more work. llvm-svn: 58832
* Refactor various TargetAsmInfo subclasses' TargetMachine members awayDan Gohman2008-11-031-1/+2
| | | | | | adding a TargetMachine member to the base TargetAsmInfo class instead. llvm-svn: 58624
* Get rid of now unused {Four,Eight,Sixteen}ByteConstantSectionAnton Korobeynikov2008-09-241-2/+0
| | | | llvm-svn: 56580
* Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel2008-01-291-4/+2
| | | | | | | | | | | | | | only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. llvm-svn: 46483
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-3/+2
| | | | llvm-svn: 45418
* Updated source file headers to llvm coding standard.Scott Michel2007-12-051-3/+2
| | | | llvm-svn: 44597
* Main CellSPU backend files checked in. Intrinsics and autoconf filesScott Michel2007-12-051-0/+56
remain. llvm-svn: 44595
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