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* Remove the CellSPU port.Eric Christopher2012-11-1451-14676/+0
| | | | | | Approved by Chris Lattner. llvm-svn: 167984
* Set FFLOOR for vectors to expand on CellSPU to keep instruction selection ↵Craig Topper2012-11-141-1/+2
| | | | | | from failing on llvm.floor of a vector. llvm-svn: 167914
* Implement a basic VectorTargetTransformInfo interface to be used by the loop ↵Nadav Rotem2012-10-241-1/+1
| | | | | | and bb vectorizers for modeling the cost of instructions. llvm-svn: 166593
* Reapply the TargerTransformInfo changes, minus the changes to LSR and ↵Nadav Rotem2012-10-182-1/+11
| | | | | | Lowerinvoke. llvm-svn: 166248
* Temporarily revert the TargetTransform changes.Bob Wilson2012-10-182-11/+1
| | | | | | | | | | | The TargetTransform changes are breaking LTO bootstraps of clang. I am working with Nadav to figure out the problem, but I am reverting it for now to get our buildbots working. This reverts svn commits: 165665 165669 165670 165786 165787 165997 and I have also reverted clang svn 165741 llvm-svn: 166168
* Add a new interface to allow IR-level passes to access codegen-specific ↵Nadav Rotem2012-10-102-1/+11
| | | | | | information. llvm-svn: 165665
* Move TargetData to DataLayout.Micah Villmow2012-10-084-8/+8
| | | | llvm-svn: 165402
* Fix Doxygen issues:Dmitri Gribenko2012-09-141-15/+15
| | | | | | | | | | * wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param instead of \arg to document parameters in order to be consistent with the rest of the codebase. llvm-svn: 163902
* Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-242-11/+8
| | | | | | Reviewed offline by chandlerc. llvm-svn: 162623
* Remove tabs.Bill Wendling2012-07-191-4/+4
| | | | llvm-svn: 160477
* Remove tabs.Bill Wendling2012-07-191-9/+9
| | | | llvm-svn: 160476
* Remove variable_ops from call instructions in most targets.Jakob Stoklund Olesen2012-07-131-2/+2
| | | | | | | | Call instructions are no longer required to be variadic, and variable_ops should only be used for instructions that encode a variable number of arguments, like the ARM stm/ldm instructions. llvm-svn: 160189
* Add all codegen passes to the PassManager via TargetPassConfig.Bob Wilson2012-07-021-3/+3
| | | | | | | | This is a preliminary step toward having TargetPassConfig be able to start and stop the compilation at specified passes for unit testing and debugging. No functionality change. llvm-svn: 159567
* There are a number of generic inline asm operand modifiers thatJack Carter2012-06-261-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | up to r158925 were handled as processor specific. Making them generic and putting tests for these modifiers in the CodeGen/Generic directory caused a number of targets to fail. This commit addresses that problem by having the targets call the generic routine for generic modifiers that they don't currently have explicit code for. For now only generic print operands 'c' and 'n' are supported.vi Affected files: test/CodeGen/Generic/asm-large-immediate.ll lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/NVPTX/NVPTXAsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/XCore/XCoreAsmPrinter.cpp lib/Target/X86/X86AsmPrinter.cpp lib/Target/Hexagon/HexagonAsmPrinter.cpp lib/Target/CellSPU/SPUAsmPrinter.cpp lib/Target/Sparc/SparcAsmPrinter.cpp lib/Target/MBlaze/MBlazeAsmPrinter.cpp lib/Target/Mips/MipsAsmPrinter.cpp MSP430 isn't represented because it did not even run with the long existing 'c' modifier and it was not apparent what needs to be done to get it inline asm ready. Contributer: Jack Carter llvm-svn: 159203
* llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.NAKAMURA Takumi2012-06-241-0/+2
| | | | llvm-svn: 159112
* Revert r158679 - use case is unclear (and it increases the memory footprint).Hal Finkel2012-06-221-1/+1
| | | | | | | | | | Original commit message: Allow up to 64 functional units per processor itinerary. This patch changes the type used to hold the FU bitset from unsigned to uint64_t. This will be needed for some upcoming PowerPC itineraries. llvm-svn: 159027
* Allow up to 64 functional units per processor itinerary.Hal Finkel2012-06-181-1/+1
| | | | | | | This patch changes the type used to hold the FU bitset from unsigned to uint64_t. This will be needed for some upcoming PowerPC itineraries. llvm-svn: 158679
* Round 2 of dead private variable removal.Benjamin Kramer2012-06-063-12/+1
| | | | | | | | LLVM is now -Wunused-private-field clean except for - lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields. - gtest. llvm-svn: 158096
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-252-17/+18
| | | | | | | | | | to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB llvm-svn: 157479
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-072-2/+3
| | | | | | | | | | | | | The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! llvm-svn: 156328
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-3/+3
| | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 llvm-svn: 155902
* Update the documentation of CellSPU, in case it gets removed in 3.1.Kalle Raiskila2012-04-291-0/+14
| | | | llvm-svn: 155797
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on X86 Atom. Some of our tests failed because the tail merging part of the BranchFolding pass was creating new basic blocks which did not contain live-in information. When the anti-dependency code in the Post-RA scheduler ran, it would sometimes rename the register containing the function return value because the fact that the return value was live-in to the subsequent block had been lost. To fix this, it is necessary to run the RegisterScavenging code in the BranchFolding pass. This patch makes sure that the register scavenging code is invoked in the X86 subtarget only when post-RA scheduling is being done. Post RA scheduling in the X86 subtarget is only done for Atom. This patch adds a new function to the TargetRegisterClass to control whether or not live-ins should be preserved during branch folding. This is necessary in order for the anti-dependency optimizations done during the PostRASchedulerList pass to work properly when doing Post-RA scheduling for the X86 in general and for the Intel Atom in particular. The patch adds and invokes the new function trackLivenessAfterRegAlloc() instead of using the existing requiresRegisterScavenging(). It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of requiresRegisterScavenging(). It changes the all the targets that implemented requiresRegisterScavenging() to also implement trackLivenessAfterRegAlloc(). It adds an assertion in the Post RA scheduler to make sure that post RA liveness information is available when it is needed. It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order to avoid running into the added assertion. Finally, this patch restores the use of anti-dependency checking (which was turned off temporarily for the 3.1 release) for Intel Atom in the Post RA scheduler. Patch by Andy Zhang! Thanks to Jakob and Anton for their reviews. llvm-svn: 155395
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-202-35/+35
| | | | | | since they are equivalent. llvm-svn: 155188
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-201-40/+36
| | | | | | since they are equivalent. llvm-svn: 155186
* Remove unused CCIfSubtarget.Jay Foad2012-04-171-4/+0
| | | | llvm-svn: 154921
* Always compute all the bits in ComputeMaskedBits.Rafael Espindola2012-04-042-2/+0
| | | | | | | | This allows us to keep passing reduced masks to SimplifyDemandedBits, but know about all the bits if SimplifyDemandedBits fails. This allows instcombine to simplify cases like the one in the included testcase. llvm-svn: 154011
* Prune some includesCraig Topper2012-03-271-1/+0
| | | | llvm-svn: 153502
* Remove unnecessary llvm:: qualificationsCraig Topper2012-03-271-1/+1
| | | | llvm-svn: 153500
* Remove some unnecessary forward declarations.Craig Topper2012-03-221-2/+0
| | | | llvm-svn: 153245
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-176-8/+5
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* Remove global map. This code isn't even hot.Benjamin Kramer2012-03-111-38/+28
| | | | llvm-svn: 152544
* Use uint16_t to store registers and opcode in static tables in the target ↵Craig Topper2012-03-111-2/+2
| | | | | | specific backends. llvm-svn: 152537
* Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper2012-03-042-3/+3
| | | | | | size of static data. llvm-svn: 151996
* Re-commit r151623 with fix. Only issue special no-return calls if it's a ↵Evan Cheng2012-02-282-4/+5
| | | | | | direct call. llvm-svn: 151645
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack ↵Daniel Dunbar2012-02-282-5/+4
| | | | | | prediction. ...", it is breaking the Clang build during the Compiler-RT part. llvm-svn: 151630
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-282-4/+5
| | | | | | | | | | | | | | | | | the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 llvm-svn: 151623
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-1824-35/+35
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* unnecessary includeAndrew Trick2012-02-101-1/+0
| | | | llvm-svn: 150228
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-4/+2
| | | | llvm-svn: 149961
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-0/+1
| | | | llvm-svn: 149814
* TargetPassConfig: confine the MC configuration to TargetMachine.Andrew Trick2012-02-042-8/+5
| | | | | | | | | | Passes prior to instructon selection are now split into separate configurable stages. Header dependencies are simplified. The bulk of this diff is simply removal of the silly DisableVerify flags. Sorry for the target header churn. Attempting to stabilize them. llvm-svn: 149754
* Added TargetPassConfig. The first little step toward configuring codegen passes.Andrew Trick2012-02-032-11/+32
| | | | | | | | | | | Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. llvm-svn: 149672
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-203-28/+3
| | | | llvm-svn: 148578
* Remove VectorExtras. This unused helper was written for a type of API that ↵Benjamin Kramer2012-01-071-1/+0
| | | | | | is discouraged now. llvm-svn: 147738
* Fix up the CMake build for the new files added in r146960, they'reChandler Carruth2011-12-201-0/+1
| | | | | | likely to stay either way that discussion ends up resolving itself. llvm-svn: 146966
* Unweaken vtables as per ↵David Blaikie2011-12-204-2/+21
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-131-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | undefined result. This adds new ISD nodes for the new semantics, selecting them when the LLVM intrinsic indicates that the undef behavior is desired. The new nodes expand trivially to the old nodes, so targets don't actually need to do anything to support these new nodes besides indicating that they should be expanded. I've done this for all the operand types that I could figure out for all the targets. Owners of various targets, please review and let me know if any of these are incorrect. Note that the expand behavior is *conservatively correct*, and exactly matches LLVM's current behavior with these operations. Ideally this patch will not change behavior in any way. For example the regtest suite finds the exact same instruction sequences coming out of the code generator. That's why there are no new tests here -- all of this is being exercised by the existing test suite. Thanks to Duncan Sands for reviewing the various bits of this patch and helping me get the wrinkles ironed out with expanding for each target. Also thanks to Chris for clarifying through all the discussions that this is indeed the approach he was looking for. That said, there are likely still rough spots. Further review much appreciated. llvm-svn: 146466
* LLVMBuild: Introduce a common section which currently has a list of theDaniel Dunbar2011-12-121-0/+3
| | | | | | | | | | | subdirectories to traverse into. - Originally I wanted to avoid this and just autoscan, but this has one key flaw in that new subdirectories can not automatically trigger a rerun of the llvm-build tool. This is particularly a pain when switching back and forth between trees where one has added a subdirectory, as the dependencies will tend to be wrong. This will also eliminates FIXME implicitly. llvm-svn: 146436
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-123-3/+0
| | | | llvm-svn: 146409
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