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path: root/llvm/lib/Target/CellSPU/SPUSubtarget.h
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* Remove the CellSPU port.Eric Christopher2012-11-141-97/+0
| | | | | | Approved by Chris Lattner. llvm-svn: 167984
* Move TargetData to DataLayout.Micah Villmow2012-10-081-2/+2
| | | | llvm-svn: 165402
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-071-1/+2
| | | | llvm-svn: 134606
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-011-1/+1
| | | | llvm-svn: 134281
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-011-3/+3
| | | | llvm-svn: 134259
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-011-1/+4
| | | | | | | | | itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. llvm-svn: 134257
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-3/+3
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Sink SubtargetFeature and TargetInstrItineraries (renamed ↵Evan Cheng2011-06-291-2/+1
| | | | | | MCInstrItineraries) into MC. llvm-svn: 134049
* Enable PostRA scheduling for SPU. Kalle Raiskila2010-11-291-0/+4
| | | | | | | This speeds up selected test cases with up to 5% - no slowdowns observed. llvm-svn: 120286
* Change v64 datalayout in SPU.Kalle Raiskila2010-10-261-1/+1
| | | | | | | | | | | | | | The SPU ABI does not mention v64, and all examples in C suggest v128 are treated similarily to arrays, we use array alignment for v64 too. This makes the alignment of e.g. [2 x <2 x i32>] behave "intuitively" and similar to as if the elements were e.g. i32s. This also makes an "unaligned store" test to be aligned, with different (but functionally equivalent) code generated. llvm-svn: 117360
* indicate what the native integer types for the target are.Chris Lattner2009-11-071-1/+1
| | | | | | Please verify. llvm-svn: 86397
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-7/+2
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* Propagate CPU string out of SubtargetFeaturesAnton Korobeynikov2009-05-231-2/+3
| | | | llvm-svn: 72335
* CellSPU:Scott Michel2009-01-061-1/+1
| | | | | | | - Add preliminary support for v2i32; load/store generates the right code but there's a lot work to be done to make this vector type operational. llvm-svn: 61829
* Rewrite tblgen handling of subtarget features soDale Johannesen2008-02-141-0/+1
| | | | | | | | | | it follows the order of the enum, not alphabetical. The motivation is to make -mattr=+ssse3,+sse41 select SSE41 as it ought to. Added "ignored" enum values of 0 to PPC and SPU to avoid compiler warnings. llvm-svn: 47143
* More cleanups for CellSPU:Scott Michel2008-01-301-1/+1
| | | | | | | | | - Expand tabs... (poss 80-col violations, will get them later...) - Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single function, simplifying maintenance. Also reduced custom instruction generation for SPUvecinsert/INSERT_MASK. llvm-svn: 46544
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-6/+5
| | | | llvm-svn: 45418
* Updated source file headers to llvm coding standard.Scott Michel2007-12-051-3/+2
| | | | llvm-svn: 44597
* Main CellSPU backend files checked in. Intrinsics and autoconf filesScott Michel2007-12-051-0/+95
remain. llvm-svn: 44595
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