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path: root/llvm/lib/Target/CellSPU/SPUHazardRecognizers.h
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* Remove the CellSPU port.Eric Christopher2012-11-141-37/+0
| | | | | | Approved by Chris Lattner. llvm-svn: 167984
* Round 2 of dead private variable removal.Benjamin Kramer2012-06-061-5/+1
| | | | | | | | LLVM is now -Wunused-private-field clean except for - lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields. - gtest. llvm-svn: 158096
* Various bits of framework needed for precise machine-level selectionAndrew Trick2010-12-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | DAG scheduling during isel. Most new functionality is currently guarded by -enable-sched-cycles and -enable-sched-hazard. Added InstrItineraryData::IssueWidth field, currently derived from ARM itineraries, but could be initialized differently on other targets. Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is active, and if so how many cycles of state it holds. Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry into the scheduler's available queue. ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to get information about it's SUnits, provides RecedeCycle for bottom-up scheduling, correctly computes scoreboard depth, tracks IssueCount, and considers potential stall cycles when checking for hazards. ScheduleDAGRRList now models machine cycles and hazards (under flags). It tracks MinAvailableCycle, drives the hazard recognizer and priority queue's ready filter, manages a new PendingQueue, properly accounts for stall cycles, etc. llvm-svn: 122541
* whitespaceAndrew Trick2010-12-241-1/+1
| | | | llvm-svn: 122539
* Generalize the HazardRecognizer interface so that it can be usedDan Gohman2009-01-151-6/+6
| | | | | | | to support MachineInstr-based scheduling in addition to SDNode-based scheduling. llvm-svn: 62284
* Experimental post-pass scheduling support. Post-pass schedulingDan Gohman2008-11-191-1/+1
| | | | | | | | | | | | | | | | | is currently off by default, and can be enabled with -disable-post-RA-scheduler=false. This doesn't have a significant impact on most code yet because it doesn't yet do anything to address anti-dependencies and it doesn't attempt to disambiguate memory references. Also, several popular targets don't have pipeline descriptions yet. The majority of the changes here are splitting the SelectionDAG-specific code out of ScheduleDAG, so that ScheduleDAG can be moved to libLLVMCodeGen.a. The interface between ScheduleDAG-using code and the rest of the scheduling code is somewhat rough and will evolve. llvm-svn: 59676
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-3/+2
| | | | llvm-svn: 45418
* Updated source file headers to llvm coding standard.Scott Michel2007-12-051-3/+2
| | | | llvm-svn: 44597
* More of the Cell SPU code drop from "Team Aerospace".Scott Michel2007-12-041-0/+43
llvm-svn: 44582
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