| Commit message (Collapse) | Author | Age | Files | Lines |
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Approved by Chris Lattner.
llvm-svn: 167984
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MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
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llvm-svn: 149814
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and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
llvm-svn: 144788
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These are strictly utilities for registering targets and components.
llvm-svn: 138450
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from MC.
llvm-svn: 138367
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llvm-svn: 135826
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InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.
llvm-svn: 135812
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- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.
llvm-svn: 135580
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(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
llvm-svn: 135468
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better location welcome).
llvm-svn: 135438
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to MCRegisterInfo. Also initialize the mapping at construction time.
This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.
llvm-svn: 135424
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MCTargetDesc to prepare for next round of changes.
llvm-svn: 135219
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registeration and creation code into XXXMCDesc libraries.
llvm-svn: 135184
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