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path: root/llvm/lib/Target/AVR/AVRISelLowering.cpp
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* AVR: Update for getRegisterByName changeMatt Arsenault2020-01-091-2/+2
* [AVR] Fix codegen for rotate instructionsJim Lin2019-12-231-3/+2
* TLI: Remove DAG argument from getRegisterByNameMatt Arsenault2019-10-011-4/+3
* [Alignment][NFC] Remove unneeded llvm:: scoping on Align typesGuillaume Chatelet2019-09-271-1/+1
* Replicate the change "[Alignment][NFC] Use Align with TargetLowering::setMinF...Sylvestre Ledru2019-09-071-1/+1
* [LLVM][Alignment] Make functions using log of alignment explicitGuillaume Chatelet2019-09-051-1/+1
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-6/+6
* Emit diagnostic if an inline asm constraint requires an immediateBill Wendling2019-08-031-3/+3
* [AVR] Change limit type to match the argument type (NFC)Evandro Menezes2019-06-191-1/+1
* [AVR] Expand 16-bit rotations during the legalization stageDylan McKay2019-06-071-2/+2
* [AVR] Fix a typo - 's/analisys/analysis'Dylan McKay2019-02-131-1/+1
* [AVR] Insert unconditional branch when inserting MBBs between blocks with fal...Dylan McKay2019-01-211-0/+9
* Revert "[AVR] Insert unconditional branch when inserting MBBs between blocks ...Dylan McKay2019-01-211-9/+0
* [AVR] Insert unconditional branch when inserting MBBs between blocks with fal...Dylan McKay2019-01-211-0/+9
* [AVR] Fix codegen bug in 16-bit loadsDylan McKay2019-01-201-3/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hard...Dylan McKay2019-01-181-11/+17
* [AVR] Redefine the 'LSL' instruction as an alias of 'ADD'Dylan McKay2018-09-011-1/+2
* [AVR] Define the ROL instruction as an alias of ADCDylan McKay2018-09-011-2/+8
* [AVR] Re-enable expansion of ADDE/ADDC/SUBE/SUBC in ISelDylan McKay2018-07-291-0/+7
* [AVR] Lower i128 divisions to runtime library callsDylan McKay2018-03-191-0/+3
* [AVR] Fix a lowering bug in AVRISelLowering.cppDylan McKay2018-02-191-4/+6
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-2/+2
* Relax unaligned access assertion when type is byte alignedDylan McKay2017-12-091-0/+1
* [AVR] Prefer BasicBlock::getIterator over Function::begin()Dylan McKay2017-09-261-1/+1
* [AVR] When lowering shifts into loops, put newly generated MBBs in the sameDylan McKay2017-09-261-2/+4
* [SystemZ, LoopStrengthReduce]Jonas Paulsson2017-07-211-1/+1
* [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-2/+2
* [AVR] When lowering Select8/Select16, put newly generated MBBs in the same spotDylan McKay2017-05-131-2/+3
* [AVR] Migrate to new StructType::get owing to Supress all uses of LLVM_END_WI...Leslie Zhai2017-05-121-1/+1
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-091-2/+1
* [AVR] Implement non-constant bit rotationsDylan McKay2017-05-011-0/+31
* [AVR] Fix build after r298178Meador Inge2017-03-241-9/+9
* Rename AttributeSet to AttributeListReid Kleckner2017-03-211-1/+1
* Make library calls sensitive to regparm module flag (Fixes PR3997).Nirav Dave2017-03-181-2/+1
* [AVR] Implement stacksave/stackrestore by expanding (PR31342)Dylan McKay2017-02-051-0/+2
* [AVR] Support zero-sized arguments in defined methodsDylan McKay2017-02-051-0/+6
* [AVR] Implement TargetLoweing::getRegisterByNameDylan McKay2017-01-071-0/+41
* [AVR] Expand 'SELECT_CC' nodes whereever possibleDylan McKay2016-12-071-2/+2
* [AVR] Add instruction selection lowering codeDylan McKay2016-11-021-0/+1937
* Revert "[AVR] Add instruction selection lowering code"Dylan McKay2016-09-291-1940/+0
* [AVR] Add instruction selection lowering codeDylan McKay2016-09-291-0/+1940
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