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path: root/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
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* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+2
* Move function dependent resetting of a subtarget variable out of theEric Christopher2014-07-041-1/+2
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-3/+3
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* ARM: Range based for-loop over block predecessors.Jim Grosbach2014-04-041-3/+2
* Prune includes in ARM target.Craig Topper2014-03-221-2/+1
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-101-2/+2
* Range-ify some for loops.Owen Anderson2014-03-071-8/+4
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-2/+2
* Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocksWeiming Zhao2014-01-131-0/+3
* ARM: decide whether to use movw/movt based on "minsize" attribute.Tim Northover2013-12-021-2/+1
* ARM: Remove unused variable.Benjamin Kramer2013-04-081-2/+0
* Avoid high-latency false CPSR dependencies even for tMOVSi.Jakob Stoklund Olesen2013-04-041-46/+103
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
* Resort the #include lines in include/... and lib/... with theChandler Carruth2013-01-021-1/+1
* Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling2012-12-301-3/+5
* On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,Evan Cheng2012-12-201-77/+92
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...Bill Wendling2012-12-191-1/+1
* Disable ARM partial flag dependency optimization at -OzQuentin Colombet2012-12-181-2/+10
* Repair bundles that were broken by removing and reinserting the firstJakob Stoklund Olesen2012-12-181-1/+8
* Extract a method, no functional change intended.Jakob Stoklund Olesen2012-12-181-31/+35
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-5/+5
* Revert r162713: "Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ...Jakob Stoklund Olesen2012-08-281-21/+5
* Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ARM.Jakob Stoklund Olesen2012-08-271-5/+21
* Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits...Sebastian Pop2012-05-041-0/+1
* Tidy up. 80 columns.Jim Grosbach2012-04-061-1/+1
* Use uint16_t to store registers and opcode in static tables in the target spe...Craig Topper2012-03-111-3/+3
* Use uint16_t to store instruction implicit uses and defs. Reduces static data.Craig Topper2012-03-081-1/+1
* Make sure the regs are low regs for tMUL size reduction.Jim Grosbach2012-02-241-1/+6
* Thumb2 size reduction fix for tied operands of tMUL.Jim Grosbach2012-02-241-1/+13
* Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle.Evan Cheng2011-12-171-4/+7
* - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng2011-12-141-13/+28
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-3/+2
* Avoid partial CPSR dependency from loop backedges. rdar://10357570Evan Cheng2011-10-271-24/+43
* Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach2011-08-241-0/+1
* ARM extend instructions simplification.Jim Grosbach2011-07-271-5/+13
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A...Evan Cheng2011-07-201-1/+1
* Fix off-by-one error.Jim Grosbach2011-07-011-1/+1
* Pseudo-ize t2MOVCC[ri].Jim Grosbach2011-07-011-2/+0
* Refact ARM Thumb1 tMOVr instruction family.Jim Grosbach2011-06-301-1/+1
* Size reducing SP adjusting t2ADDri needs to check predication.Jim Grosbach2011-06-301-1/+4
* Remove redundant Thumb2 ADD/SUB SP instruction definitions.Jim Grosbach2011-06-291-26/+47
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-34/+34
* use the MachineInstrBuilder operator-> to simplify some code.Chris Lattner2011-04-291-1/+1
* Avoid some 's' 16-bit instruction which partially update CPSRBob Wilson2011-04-191-85/+165
* Handle MI flags inside Thumb2SizeReduction pass.Anton Korobeynikov2011-03-051-0/+9
* Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 ...Owen Anderson2011-02-081-43/+9
* Temporary workaround for a bad bug introduced by r121082 which replacedEvan Cheng2011-02-081-8/+5
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-29/+36
* Refactor the ARM CMPz* patterns to just use the normal CMP instructions whenJim Grosbach2010-12-071-5/+3
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