index
:
bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
llvm
/
lib
/
Target
/
ARM
/
Thumb1InstrInfo.cpp
Commit message (
Expand
)
Author
Age
Files
Lines
*
It's ok to spill a tGPR register as long as it's still allocated a low register.
Evan Cheng
2009-08-13
1
-6
/
+14
*
Shrinkify Thumb2 load / store multiple instructions.
Evan Cheng
2009-08-11
1
-5
/
+11
*
Move the getInlineAsmLength virtual method from TAI to TII, where
Chris Lattner
2009-08-02
1
-2
/
+1
*
- More refactoring. This gets rid of all of the getOpcode calls.
Evan Cheng
2009-07-28
1
-12
/
+0
*
More DCE.
Evan Cheng
2009-07-27
1
-4
/
+0
*
Get rid of more dead code.
Evan Cheng
2009-07-27
1
-2
/
+0
*
Get rid of some more getOpcode calls.
Evan Cheng
2009-07-27
1
-3
/
+0
*
Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m...
Evan Cheng
2009-07-27
1
-2
/
+0
*
Merge isLoadFromStackSlot into one since it behaves the same regardless of su...
Evan Cheng
2009-07-27
1
-32
/
+0
*
Just use a single isMoveInstr to catch all the cases.
Evan Cheng
2009-07-27
1
-23
/
+0
*
Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ...
Evan Cheng
2009-07-26
1
-12
/
+12
*
Change Thumb2 jumptable codegen to one that uses two level jumps:
Evan Cheng
2009-07-25
1
-3
/
+0
*
Remove unused member functions.
Eli Friedman
2009-07-24
1
-42
/
+0
*
FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi...
Evan Cheng
2009-07-24
1
-8
/
+0
*
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...
David Goodwin
2009-07-24
1
-8
/
+4
*
Fix frame index elimination to correctly handle thumb-2 addressing modes that...
David Goodwin
2009-07-23
1
-0
/
+6
*
Emit cross regclass register moves for thumb2.
Anton Korobeynikov
2009-07-16
1
-5
/
+0
*
Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...
Evan Cheng
2009-07-11
1
-15
/
+21
*
Generalize opcode selection in ARMBaseRegisterInfo.
David Goodwin
2009-07-08
1
-0
/
+1
*
Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...
David Goodwin
2009-07-08
1
-0
/
+55
*
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...
David Goodwin
2009-07-02
1
-0
/
+304