| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [ARM] Add ARMv8.2-A FP16 scalar instructions | Oliver Stannard | 2016-01-25 | 1 | -0/+3 |
| * | Remove extra forward declarations and scrub includes for all in tree InstPrin... | Craig Topper | 2015-12-25 | 1 | -3/+0 |
| * | Revert "[ARM] Add ARMv8.2-A FP16 scalar instructions" | Reid Kleckner | 2015-12-16 | 1 | -3/+0 |
| * | [ARM] Add ARMv8.2-A FP16 scalar instructions | Oliver Stannard | 2015-12-16 | 1 | -0/+3 |
| * | Remove unused MCSubtargetInfo argument from the ARM MCInstPrinter ctors. | Eric Christopher | 2015-03-30 | 1 | -1/+1 |
| * | [ARM] Enable changing instprinter's behavior based on the per-function | Akira Hatanaka | 2015-03-27 | 1 | -74/+135 |
| * | clang-format ARMInstPrinter.{h,cpp} before I make changes to these files. | Akira Hatanaka | 2015-03-27 | 1 | -8/+7 |
| * | [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the | Akira Hatanaka | 2015-03-27 | 1 | -1/+2 |
| * | Add support for ARM modified-immediate assembly syntax. | Asiri Rathnayake | 2014-12-02 | 1 | -0/+1 |
| * | ARM: remove dead InstPrinting code | Tim Northover | 2014-10-06 | 1 | -1/+0 |
| * | ARM: implement MRS/MSR (banked reg) system instructions. | Tim Northover | 2014-08-15 | 1 | -0/+1 |
| * | Canonicalize header guards into a common format. | Benjamin Kramer | 2014-08-13 | 1 | -2/+2 |
| * | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 2014-03-10 | 1 | -2/+2 |
| * | This corrects the implementation of Thumb ADR instruction. There are three i... | Mihai Popa | 2013-07-03 | 1 | -0/+1 |
| * | ARM: add operands pre-writeback variants when needed | Amaury de la Vieuville | 2013-06-18 | 1 | -0/+2 |
| * | ARM: ISB cannot be passed the same options as DMB | Amaury de la Vieuville | 2013-06-10 | 1 | -0/+1 |
| * | ARM: Correct printing of pre-indexed operands. | Quentin Colombet | 2013-04-12 | 1 | -2/+5 |
| * | Remove hard coded registers in ARM ldrexd and strexd instructions | Weiming Zhao | 2012-11-16 | 1 | -0/+1 |
| * | ARM: Better disassembly for pc-relative LDR. | Jim Grosbach | 2012-10-30 | 1 | -1/+2 |
| * | Fix #13241, a bug around shift immediate operand for ARM instruction ADR. | Jiangning Liu | 2012-08-02 | 1 | -0/+1 |
| * | Move getOpcodeName from the various target InstPrinters into the superclass M... | Benjamin Kramer | 2012-04-02 | 1 | -1/+0 |
| * | Remove getInstructionName from MCInstPrinter implementations in favor of usin... | Craig Topper | 2012-04-02 | 1 | -2/+0 |
| * | Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ... | Craig Topper | 2012-04-02 | 1 | -2/+2 |
| * | ARM refactor more NEON VLD/VST instructions to use composite physregs | Jim Grosbach | 2012-03-06 | 1 | -5/+3 |
| * | Tidy up. Kill some dead code. | Jim Grosbach | 2012-03-06 | 1 | -1/+0 |
| * | ARM Refactor VLD/VST spaced pair instructions. | Jim Grosbach | 2012-03-05 | 1 | -0/+2 |
| * | ARM refactor away a bunch of VLD/VST pseudo instructions. | Jim Grosbach | 2012-03-05 | 1 | -0/+1 |
| * | Make MCRegisterInfo available to the the MCInstPrinter. | Jim Grosbach | 2012-03-05 | 1 | -1/+2 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | NEON VLD4(all lanes) assembly parsing and encoding. | Jim Grosbach | 2012-01-25 | 1 | -0/+4 |
| * | NEON VLD3(all lanes) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 1 | -0/+4 |
| * | NEON VLD4(multiple 4 element structures) assembly parsing. | Jim Grosbach | 2012-01-24 | 1 | -0/+2 |
| * | NEON VLD3(multiple 3-element structures) assembly parsing. | Jim Grosbach | 2012-01-23 | 1 | -0/+2 |
| * | ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point). | Jim Grosbach | 2011-12-22 | 1 | -0/+2 |
| * | ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback. | Jim Grosbach | 2011-12-21 | 1 | -0/+2 |
| * | ARM NEON VST2 assembly parsing and encoding. | Jim Grosbach | 2011-12-14 | 1 | -0/+2 |
| * | ARM parsing for VLD1 two register all lanes, no writeback. | Jim Grosbach | 2011-11-30 | 1 | -0/+2 |
| * | ARM parsing aliases for VLD1 single register all lanes. | Jim Grosbach | 2011-11-30 | 1 | -0/+2 |
| * | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -0/+1 |
| * | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -0/+1 |
| * | ARM VLD parsing and encoding. | Jim Grosbach | 2011-10-21 | 1 | -0/+1 |
| * | ARM VTBL (one register) assembly parsing and encoding. | Jim Grosbach | 2011-10-18 | 1 | -0/+1 |
| * | ARM parsing and encoding for the <option> form of LDC/STC instructions. | Jim Grosbach | 2011-10-12 | 1 | -0/+1 |
| * | ARM NEON assembly parsing and encoding for VDUP(scalar). | Jim Grosbach | 2011-10-07 | 1 | -0/+1 |
| * | ARM fix encoding of VMOV.f32 and VMOV.f64 immediates. | Jim Grosbach | 2011-09-30 | 1 | -2/+1 |
| * | Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix o... | Owen Anderson | 2011-09-21 | 1 | -1/+0 |
| * | Print out immediate offset versions of PC-relative load/store instructions as... | Owen Anderson | 2011-09-21 | 1 | -0/+2 |
| * | Thumb2 assembly parsing and encoding for TBB/TBH. | Jim Grosbach | 2011-09-19 | 1 | -0/+2 |
| * | Don't attach annotations to MCInst's. Instead, have the disassembler return,... | Owen Anderson | 2011-09-15 | 1 | -1/+1 |
| * | Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. | Jim Grosbach | 2011-09-09 | 1 | -0/+2 |
