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path: root/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
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* ARM: add operands pre-writeback variants when neededAmaury de la Vieuville2013-06-181-22/+28
* ARM: fix thumb literal loads decodingAmaury de la Vieuville2013-06-181-7/+21
* ARM: fix t2am_imm8_offset operand printing for imm=#-0Amaury de la Vieuville2013-06-131-1/+3
* ARM: ISB cannot be passed the same options as DMBAmaury de la Vieuville2013-06-101-0/+6
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-241-3/+3
* ARM: Correct printing of pre-indexed operands.Quentin Colombet2013-04-121-7/+11
* Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls2013-02-221-2/+1
* Added a option to the disassembler to print immediates as hex.Kevin Enderby2012-12-051-7/+7
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+2
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-0/+38
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-301-2/+2
* Make branch heavy code for generating marked up disassembly simplerKevin Enderby2012-10-231-304/+142
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-221-128/+486
* ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable]NAKAMURA Takumi2012-09-221-0/+2
* Whitespace.NAKAMURA Takumi2012-09-221-2/+2
* Fix edge cases of ARM shift operands in arith instructions.Tim Northover2012-09-221-38/+6
* Fix the handling of edge cases in ARM shifted operands.Tim Northover2012-09-221-8/+20
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu2012-08-021-12/+19
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-021-0/+19
* ARM: Define generic HINT instruction.Jim Grosbach2012-06-181-0/+21
* Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,Kevin Enderby2012-06-151-10/+20
* Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby2012-05-171-5/+23
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga2012-05-111-2/+6
* Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton2012-04-271-1/+2
* For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby2012-04-131-2/+2
* Move getOpcodeName from the various target InstPrinters into the superclass M...Benjamin Kramer2012-04-021-4/+0
* Remove getInstructionName from MCInstPrinter implementations in favor of usin...Craig Topper2012-04-021-2/+2
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ...Craig Topper2012-04-021-1/+2
* ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-061-5/+4
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-061-18/+8
* Tidy up. Kill some dead code.Jim Grosbach2012-03-061-9/+0
* ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-051-0/+9
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-0/+9
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-051-1/+2
* Change ARMInstPrinter::printPredicateOperand() so it will not abort if itKevin Enderby2012-03-011-1/+4
* Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles2012-02-191-1/+0
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-2/+2
* NEON VLD4(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-251-1/+25
* NEON VLD3(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-241-0/+22
* NEON VLD4(multiple 4 element structures) assembly parsing.Jim Grosbach2012-01-241-0/+12
* NEON VLD3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-231-0/+10
* ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-221-0/+10
* ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach2011-12-211-0/+10
* ARM assembly parsing and encoding support for LDRD(label).Jim Grosbach2011-12-191-0/+11
* ARM NEON VST2 assembly parsing and encoding.Jim Grosbach2011-12-141-0/+10
* ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach2011-11-301-0/+9
* ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach2011-11-301-0/+7
* Simplify some uses of utohexstr.Benjamin Kramer2011-11-071-2/+2
* Fix the issue that r143552 was trying to address the _right_ way. One-regist...Owen Anderson2011-11-021-2/+6
* Assembly parsing for 4-register variant of VLD1.Jim Grosbach2011-10-211-0/+11
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