diff options
author | Jim Grosbach <grosbach@apple.com> | 2012-01-24 23:47:04 +0000 |
---|---|---|
committer | Jim Grosbach <grosbach@apple.com> | 2012-01-24 23:47:04 +0000 |
commit | b78403ce48d53622a2e80611065decb2e315a7af (patch) | |
tree | 5c07b1c6270d4110e397b8623f8ff8aa3b62b1a7 /llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | |
parent | 77c4ff2182fb9f5e95aed2f94f3263f364c612a3 (diff) | |
download | bcm5719-llvm-b78403ce48d53622a2e80611065decb2e315a7af.tar.gz bcm5719-llvm-b78403ce48d53622a2e80611065decb2e315a7af.zip |
NEON VLD3(all lanes) assembly parsing and encoding.
llvm-svn: 148882
Diffstat (limited to 'llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 27d5de81e9a..455a4876c25 100644 --- a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -1067,6 +1067,17 @@ void ARMInstPrinter::printVectorListTwoAllLanes(const MCInst *MI, << getRegisterName(MI->getOperand(OpNum).getReg() + 1) << "[]}"; } +void ARMInstPrinter::printVectorListThreeAllLanes(const MCInst *MI, + unsigned OpNum, + raw_ostream &O) { + // Normally, it's not safe to use register enum values directly with + // addition to get the next register, but for VFP registers, the + // sort order is guaranteed because they're all of the form D<n>. + O << "{" << getRegisterName(MI->getOperand(OpNum).getReg()) << "[], " + << getRegisterName(MI->getOperand(OpNum).getReg() + 1) << "[], " + << getRegisterName(MI->getOperand(OpNum).getReg() + 2) << "[]}"; +} + void ARMInstPrinter::printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum, raw_ostream &O) { // Normally, it's not safe to use register enum values directly with @@ -1086,6 +1097,17 @@ void ARMInstPrinter::printVectorListTwoSpacedAllLanes(const MCInst *MI, << getRegisterName(MI->getOperand(OpNum).getReg() + 2) << "[]}"; } +void ARMInstPrinter::printVectorListThreeSpacedAllLanes(const MCInst *MI, + unsigned OpNum, + raw_ostream &O) { + // Normally, it's not safe to use register enum values directly with + // addition to get the next register, but for VFP registers, the + // sort order is guaranteed because they're all of the form D<n>. + O << "{" << getRegisterName(MI->getOperand(OpNum).getReg()) << "[], " + << getRegisterName(MI->getOperand(OpNum).getReg() + 2) << "[], " + << getRegisterName(MI->getOperand(OpNum).getReg() + 2) << "[]}"; +} + void ARMInstPrinter::printVectorListThreeSpaced(const MCInst *MI, unsigned OpNum, raw_ostream &O) { |