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* Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add ↵Owen Anderson2011-08-221-1/+1
| | | | | | more tests. llvm-svn: 138246
* STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST ↵Owen Anderson2011-08-181-0/+4
| | | | | | | | for the purposes of decoding all operands except the predicate. Found by randomized testing. llvm-svn: 138003
* Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs ↵Owen Anderson2011-08-181-8/+42
| | | | | | have it unset. llvm-svn: 138000
* Remember to fill in some operands so we can print _something_ coherent even ↵Owen Anderson2011-08-181-1/+4
| | | | | | when decoding the CPS instruction soft-fails. llvm-svn: 137997
* Improve handling of failure and unpredictable cases for CPS, STR, and SMLA ↵Owen Anderson2011-08-181-11/+18
| | | | | | | | instructions. Fixes a large class of disassembler crashes found by randomized testing. llvm-svn: 137995
* Tidy up. 80 columns.Jim Grosbach2011-08-171-34/+49
| | | | llvm-svn: 137881
* ARM clean up the imm_sr operand class representation.Jim Grosbach2011-08-171-11/+0
| | | | | | | | | Represent the operand value as it will be encoded in the instruction. This allows removing the specialized encoder and decoder methods entirely. Add an assembler match class while we're at it to lay groundwork for parsing the thumb shift instructions. llvm-svn: 137879
* Be more careful in the Thumb decoder hooks to avoid walking off the end of ↵Owen Anderson2011-08-171-8/+12
| | | | | | the OpInfo array. llvm-svn: 137838
* Allow the MCDisassembler to return a "soft fail" status code, indicating an ↵Owen Anderson2011-08-172-592/+659
| | | | | | | | instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. Patch by James Molloy. llvm-svn: 137830
* Separate out Thumb1 instructions that need an S bit operand from those that ↵Owen Anderson2011-08-161-0/+8
| | | | | | do not, for the purposes of decoding them. llvm-svn: 137787
* Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the ↵Owen Anderson2011-08-151-16/+21
| | | | | | Thumb2 NEON decoding hooks to bring us closer to correctness. llvm-svn: 137686
* Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM ↵Owen Anderson2011-08-151-0/+15
| | | | | | | | mode. Update tests to reflect this fact. Patch by James Molloy. llvm-svn: 137647
* Fix problems decoding the to/from-lane NEON memory instructions, and add a ↵Owen Anderson2011-08-151-0/+460
| | | | | | comprehensive NEON decoding testcase. llvm-svn: 137635
* Fix some remaining issues with decoding ARM-mode memory instructions, and ↵Owen Anderson2011-08-121-19/+10
| | | | | | add another batch of tests. llvm-svn: 137502
* Fix decoding of ARM-mode STRH.Owen Anderson2011-08-121-0/+3
| | | | llvm-svn: 137499
* Fix decoding of pre-indexed stores.Owen Anderson2011-08-121-0/+41
| | | | llvm-svn: 137487
* Separate decoding for STREXD and LDREXD to make each work better.Owen Anderson2011-08-121-5/+22
| | | | llvm-svn: 137476
* ARM STRT assembly parsing and encoding.Jim Grosbach2011-08-111-2/+2
| | | | llvm-svn: 137372
* Add another accidentally omitted predicate operand.Owen Anderson2011-08-111-0/+2
| | | | llvm-svn: 137370
* Add missing predicate operand on SMLA and friends.Owen Anderson2011-08-111-0/+2
| | | | llvm-svn: 137368
* Fix decoding support for STREXD and LDREXD.Owen Anderson2011-08-111-0/+23
| | | | llvm-svn: 137356
* Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>.Owen Anderson2011-08-111-0/+4
| | | | llvm-svn: 137347
* Continue to tighten decoding by performing more operand validation.Owen Anderson2011-08-111-0/+10
| | | | llvm-svn: 137340
* ARM STRBT assembly parsing and encoding.Jim Grosbach2011-08-111-2/+2
| | | | llvm-svn: 137337
* Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases.Owen Anderson2011-08-111-0/+2
| | | | llvm-svn: 137325
* Tighten operand decoding of addrmode2 instruction. The offset register ↵Owen Anderson2011-08-111-1/+1
| | | | | | cannot be PC. llvm-svn: 137323
* Improve error checking in the new ARM disassembler. Patch by James Molloy.Owen Anderson2011-08-111-116/+159
| | | | llvm-svn: 137320
* ARM LDRT assembly parsing and encoding.Jim Grosbach2011-08-101-2/+2
| | | | llvm-svn: 137282
* Add initial support for decoding NEON instructions in Thumb2 mode.Owen Anderson2011-08-101-2/+52
| | | | llvm-svn: 137236
* Cleanups based on Nick Lewycky's feedback.Owen Anderson2011-08-101-19/+22
| | | | llvm-svn: 137224
* Push GPRnopc through a large number of instruction definitions to tighten ↵Owen Anderson2011-08-101-4/+4
| | | | | | operand decoding. llvm-svn: 137189
* Tighten operand checking of register-shifted-register operands.Owen Anderson2011-08-091-2/+2
| | | | llvm-svn: 137180
* Tighten operand checking on memory barrier instructions.Owen Anderson2011-08-091-2/+24
| | | | llvm-svn: 137176
* Tighten operand checking on CPS instructions.Owen Anderson2011-08-091-0/+5
| | | | llvm-svn: 137172
* Create a new register class for the set of all GPRs except the PC. Use it ↵Owen Anderson2011-08-091-0/+8
| | | | | | to tighten our decoding of BFI. llvm-svn: 137168
* ARM Disassembler: sign extend branch immediates.Benjamin Kramer2011-08-091-2/+2
| | | | | | Not sure about BLXi, but this is what the old disassembler did. llvm-svn: 137156
* Silence an false-positive warning.Owen Anderson2011-08-091-1/+1
| | | | llvm-svn: 137154
* Tighten Thumb1 branch predicate decoding.Owen Anderson2011-08-091-0/+3
| | | | llvm-svn: 137146
* Replace the existing ARM disassembler with a new one based on the ↵Owen Anderson2011-08-096-7211/+2247
| | | | | | | | | | FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144
* ARM simplify the postidx_reg operand encoding.Jim Grosbach2011-08-051-2/+8
| | | | | | | The immediate portion of the operand is just a boolean (the 'U' bit indicating add vs. subtract). Treat it as such. llvm-svn: 136969
* Fix broken encodings for the Thumb2 LDRD/STRD instructions.Owen Anderson2011-08-041-9/+14
| | | | llvm-svn: 136942
* ARM refactoring assembly parsing of memory address operands.Jim Grosbach2011-08-032-18/+27
| | | | | | | | | | | | | | | | | | | | | | Memory operand parsing is a bit haphazzard at the moment, in no small part due to the even more haphazzard representations of memory operands in the .td files. Start cleaning that all up, at least a bit. The addressing modes in the .td files will be being simplified to not be so monolithic, especially with regards to immediate vs. register offsets and post-indexed addressing. addrmode3 is on its way with this patch, for example. This patch is foundational to enable going back to smaller incremental patches for the individual memory referencing instructions themselves. It does just enough to get the basics in place and handle the "make check" regression tests we already have. Follow-up work will be fleshing out the details and adding more robust test cases for the individual instructions, starting with ARM mode and moving from there into Thumb and Thumb2. llvm-svn: 136845
* ARM SRS instruction parsing, diassembly and encoding support.Jim Grosbach2011-07-291-10/+7
| | | | | | | | Fix the instruction encoding for operands. Refactor mode to use explicit instruction definitions per FIXME to be more consistent with loads/stores. Fix disassembler accordingly. Add tests. llvm-svn: 136509
* ARM assembly parsing and encoding for RFE instruction.Jim Grosbach2011-07-291-4/+11
| | | | | | | | | | | Fill in the missing fixed bits and the register operand bits of the instruction encoding. Refactor the definition to make the mode explicit, which is consistent with how loads and stores are normally represented and makes parsing much easier. Add parsing aliases for pseudo-instruction variants. Update the disassembler for the new representations. Add tests for parsing and encoding. llvm-svn: 136479
* Rewrite the CMake build to use explicit dependencies between libraries,Chandler Carruth2011-07-291-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specified in the same file that the library itself is created. This is more idiomatic for CMake builds, and also allows us to correctly specify dependencies that are missed due to bugs in the GenLibDeps perl script, or change from compiler to compiler. On Linux, this returns CMake to a place where it can relably rebuild several targets of LLVM. I have tried not to change the dependencies from the ones in the current auto-generated file. The only places I've really diverged are in places where I was seeing link failures, and added a dependency. The goal of this patch is not to start changing the dependencies, merely to move them into the correct location, and an explicit form that we can control and change when necessary. This also removes a serialization point in the build because we don't have to scan all the libraries before we begin building various tools. We no longer have a step of the build that regenerates a file inside the source tree. A few other associated cleanups fall out of this. This isn't really finished yet though. After talking to dgregor he urged switching to a single CMake macro to construct libraries with both sources and dependencies in the arguments. Migrating from the two macros to that style will be a follow-up patch. Also, llvm-config is still generated with GenLibDeps.pl, which means it still has slightly buggy dependencies. The internal CMake 'llvm-config-like' macro uses the correct explicitly specified dependencies however. A future patch will switch llvm-config generation (when using CMake) to be based on these deps as well. This may well break Windows. I'm getting a machine set up now to dig into any failures there. If anyone can chime in with problems they see or ideas of how to solve them for Windows, much appreciated. llvm-svn: 136433
* Revert r136295. It broke nightly testers because some parts of codegen ↵Owen Anderson2011-07-281-1/+10
| | | | | | weren't aware of the changes to operand ordering. I hope to revive this sometime in the future, but it's not strictly necessary for now. llvm-svn: 136362
* Refactor and improve the encodings/decodings for addrmode3 loads, and make ↵Owen Anderson2011-07-271-10/+1
| | | | | | the writeback operand always the first. llvm-svn: 136295
* ARM parsing and encoding of SBFX and UBFX.Jim Grosbach2011-07-272-2/+2
| | | | | | | | | Encode the width operand as it encodes in the instruction, which simplifies the disassembler and the encoder, by using the imm1_32 operand def. Add a diagnostic for the context-sensitive constraint that the width must be in the range [1,32-lsb]. llvm-svn: 136264
* ARM cleanup of rot_imm encoding.Jim Grosbach2011-07-262-9/+2
| | | | | | | | Start of cleaning this up a bit. First step is to remove the encoder hook by storing the operand as the bits it'll actually encode to so it can just be directly used. Map it to the assembly source values 8/16/24 when we print it. llvm-svn: 136152
* Clean up a pile of hacks in our CMake build relating to TableGen.Chandler Carruth2011-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. llvm-svn: 136023
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