| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Apply again changes to support ARM memory asm parsing. I removed | Bruno Cardoso Lopes | 2011-03-31 | 1 | -3/+9 |
| * | Add BLXi to the instruction table for disassembly purpose. | Johnny Chen | 2011-03-31 | 1 | -2/+13 |
| * | Revert r128632 again, until I figure out what break the tests | Bruno Cardoso Lopes | 2011-03-31 | 1 | -9/+3 |
| * | Reapply r128585 without generating a lib depedency cycle. An updated log: | Bruno Cardoso Lopes | 2011-03-31 | 1 | -3/+9 |
| * | Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually... | Owen Anderson | 2011-03-29 | 1 | -12/+12 |
| * | Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some... | Johnny Chen | 2011-03-28 | 2 | -5/+18 |
| * | Fixed the t2PLD and friends disassembly and add two test cases. | Johnny Chen | 2011-03-26 | 2 | -10/+39 |
| * | Fix DisassembleThumb2DPReg()'s handling of RegClass. Cannot hardcode GPRRegC... | Johnny Chen | 2011-03-25 | 1 | -6/+6 |
| * | DisassembleThumb2LdSt() did not handle t2LDRs correctly with respect to RegCl... | Johnny Chen | 2011-03-25 | 1 | -2/+3 |
| * | Modify DisassembleThumb2LdStEx() to be more robust/correct in light of recent... | Johnny Chen | 2011-03-25 | 1 | -6/+6 |
| * | Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modi... | Johnny Chen | 2011-03-25 | 1 | -0/+5 |
| * | Also need to handle invalid imod values for CPS2p. | Johnny Chen | 2011-03-25 | 1 | -4/+11 |
| * | Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the regi... | Johnny Chen | 2011-03-25 | 1 | -9/+9 |
| * | Handle the added VBICiv*i* NEON instructions, too. | Johnny Chen | 2011-03-24 | 1 | -2/+7 |
| * | Plug a leak by ThumbDisassembler::getInstruction(), thanks to Benjamin Kramer! | Johnny Chen | 2011-03-24 | 1 | -3/+1 |
| * | T2 Load/Store Multiple: | Johnny Chen | 2011-03-24 | 1 | -1/+1 |
| * | Plug a leak in the arm disassembler and put the tests back. | Benjamin Kramer | 2011-03-24 | 1 | -3/+2 |
| * | The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.c... | Johnny Chen | 2011-03-24 | 1 | -0/+16 |
| * | Add comments to the handling of opcode CPS3p to reject invalid instruction en... | Johnny Chen | 2011-03-24 | 1 | -0/+2 |
| * | CPS3p: Let's reject impossible imod values by returning false from the Disass... | Johnny Chen | 2011-03-24 | 1 | -0/+3 |
| * | Load/Store Multiple: | Johnny Chen | 2011-03-24 | 1 | -4/+4 |
| * | The r128103 fix to cope with the removal of addressing modes from the MC inst... | Johnny Chen | 2011-03-24 | 1 | -2/+7 |
| * | For ARM Disassembler, start a newline to dump the opcode and friends for an i... | Johnny Chen | 2011-03-22 | 1 | -1/+1 |
| * | A8.6.399 VSTM: | Johnny Chen | 2011-03-22 | 1 | -12/+2 |
| * | Avoid -Wunused-variable in -asserts builds | Matt Beaumont-Gay | 2011-03-22 | 1 | -6/+4 |
| * | Fixed an assert by the ARM disassembler for LDRD_PRE/POST. | Johnny Chen | 2011-03-19 | 1 | -3/+4 |
| * | The disassembler for Thumb was wrongly adding 4 to the computed imm32 offset. | Johnny Chen | 2011-03-18 | 1 | -10/+2 |
| * | It used to be that t_addrmode_s4 was used for both: | Johnny Chen | 2011-03-17 | 1 | -16/+13 |
| * | There were two issues fixed: | Johnny Chen | 2011-03-15 | 1 | -12/+5 |
| * | Fixed an ARM disassembler bug where it does not handle STRi12 correctly becau... | Johnny Chen | 2011-03-15 | 1 | -6/+9 |
| * | LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT. | Johnny Chen | 2011-03-09 | 1 | -0/+3 |
| * | pr9367: Add missing predicated BLX instructions. | Bob Wilson | 2011-03-03 | 1 | -2/+4 |
| * | Add missing whitespace in the formatting. | Kevin Enderby | 2011-02-28 | 1 | -1/+1 |
| * | Fix the arm's disassembler for blx that was building an MCInst without the | Kevin Enderby | 2011-02-28 | 1 | -1/+13 |
| * | Add assembly parsing support for "msr" and also fix its encoding. Also add | Bruno Cardoso Lopes | 2011-02-18 | 2 | -10/+16 |
| * | Fix encoding and add parsing support for the arm/thumb CPS instruction: | Bruno Cardoso Lopes | 2011-02-14 | 2 | -25/+44 |
| * | Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 ... | Owen Anderson | 2011-02-08 | 2 | -10/+45 |
| * | PR9030: Fix disassembly of ARM "mov pc, lr" instruction. | Bob Wilson | 2011-01-28 | 1 | -2/+2 |
| * | CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some ... | NAKAMURA Takumi | 2010-12-29 | 1 | -2/+2 |
| * | Second attempt at converting Thumb2's LDRpci, including updating the gazillio... | Owen Anderson | 2010-12-07 | 2 | -40/+5 |
| * | Add correct encodings for STRD and LDRD, including fixup support. Additional... | Owen Anderson | 2010-12-01 | 1 | -3/+0 |
| * | Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. ... | Owen Anderson | 2010-11-30 | 2 | -40/+4 |
| * | s/ARM::BRIND/ARM::BX/g to coincide with r120366. | Bill Wendling | 2010-11-30 | 1 | -3/+3 |
| * | Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw | Jim Grosbach | 2010-11-29 | 2 | -75/+2 |
| * | Encode the multi-load/store instructions with their respective modes ('ia', | Bill Wendling | 2010-11-16 | 2 | -57/+46 |
| * | Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. | Evan Cheng | 2010-11-03 | 2 | -9/+9 |
| * | Break ARM addrmode4 (load/store multiple base address) into its constituent | Jim Grosbach | 2010-11-03 | 1 | -7/+2 |
| * | PLD, PLDW, PLI encodings, plus refactor their use of addrmode2. | Jim Grosbach | 2010-10-28 | 1 | -9/+12 |
| * | Detabify and clean up 80 column violations. | Jim Grosbach | 2010-10-13 | 3 | -40/+50 |
| * | Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern | Jim Grosbach | 2010-10-13 | 1 | -2/+6 |
