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path: root/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
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* Thumb2 BFC was insufficiently encoded.Johnny Chen2011-04-151-1/+1
* Add sanity checkings for Thumb2 Load/Store Register Exclusive family of opera...Johnny Chen2011-04-141-4/+41
* Thumb disassembler did not handle tBRIND (indirect branch) properly.Johnny Chen2011-04-131-6/+10
* The LDR*T/STR*T (unpriviledged load/store) operations don't take SP or PC as Rt.Johnny Chen2011-04-131-6/+14
* Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings as...Johnny Chen2011-04-131-1/+33
* Fix a bug where for t2MOVCCi disassembly, the TIED_TO register operand was no...Johnny Chen2011-04-131-3/+11
* Add sanity check for Ld/St Dual forms of Thumb2 instructions.Johnny Chen2011-04-121-0/+29
* The Thumb2 RFE instructions need to have their second halfword fully specified.Johnny Chen2011-04-121-2/+6
* Add bad register checks for Thumb2 Ld/St instructions.Johnny Chen2011-04-121-0/+45
* The Thumb2 Ld, St, and Preload instructions with the i12 forms should have it...Johnny Chen2011-04-121-0/+2
* Print out a debug message when the reglist fails the sanity check for Thumb L...Johnny Chen2011-04-121-0/+4
* A8.6.16 BJohnny Chen2011-04-121-0/+5
* Thumb disassembler was erroneously rejecting "blx sp" instruction.Johnny Chen2011-04-111-2/+5
* Fix the bug where the immediate shift amount for Thumb logical shift instruct...Johnny Chen2011-04-111-6/+17
* Adding support for printing operands symbolically to llvm's public 'C'Kevin Enderby2011-04-111-4/+7
* Sanity check the option operand for DMB/DSB.Johnny Chen2011-04-081-2/+17
* Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some...Johnny Chen2011-03-281-1/+5
* Fixed the t2PLD and friends disassembly and add two test cases.Johnny Chen2011-03-261-8/+4
* Fix DisassembleThumb2DPReg()'s handling of RegClass. Cannot hardcode GPRRegC...Johnny Chen2011-03-251-6/+6
* DisassembleThumb2LdSt() did not handle t2LDRs correctly with respect to RegCl...Johnny Chen2011-03-251-2/+3
* Modify DisassembleThumb2LdStEx() to be more robust/correct in light of recent...Johnny Chen2011-03-251-6/+6
* Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the regi...Johnny Chen2011-03-251-9/+9
* T2 Load/Store Multiple:Johnny Chen2011-03-241-1/+1
* Avoid -Wunused-variable in -asserts buildsMatt Beaumont-Gay2011-03-221-6/+4
* The disassembler for Thumb was wrongly adding 4 to the computed imm32 offset.Johnny Chen2011-03-181-10/+2
* It used to be that t_addrmode_s4 was used for both:Johnny Chen2011-03-171-16/+13
* Add missing whitespace in the formatting.Kevin Enderby2011-02-281-1/+1
* Fix the arm's disassembler for blx that was building an MCInst without theKevin Enderby2011-02-281-1/+13
* Add assembly parsing support for "msr" and also fix its encoding. Also addBruno Cardoso Lopes2011-02-181-3/+5
* Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes2011-02-141-16/+25
* Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 ...Owen Anderson2011-02-081-3/+38
* Second attempt at converting Thumb2's LDRpci, including updating the gazillio...Owen Anderson2010-12-071-35/+0
* Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. ...Owen Anderson2010-11-301-5/+4
* Pseudo-ize Thumb2 jump tables with explicit MC lowering to the rawJim Grosbach2010-11-291-8/+2
* Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling2010-11-161-42/+29
* Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536.Evan Cheng2010-11-031-3/+3
* Detabify and clean up 80 column violations.Jim Grosbach2010-10-131-37/+46
* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-171-9/+2
* Move the Thumb2 SSAT and USAT optional shift operator out of theBob Wilson2010-08-131-9/+13
* Refactor the code for disassembling Thumb2 saturate instructions along theBob Wilson2010-08-131-56/+39
* Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.Johnny Chen2010-08-111-2/+2
* Many Thumb2 instructions can reference the full ARM register set (i.e.,Jim Grosbach2010-07-301-40/+51
* Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instructionJim Grosbach2010-07-161-11/+11
* Start TargetRegisterClass indices at 0 instead of 1, so thatDan Gohman2010-06-181-21/+21
* Modified some assert() msg strings; no other functionality change.Johnny Chen2010-04-211-14/+14
* Thumb instructions which have reglist operands at the end and predicate operandsJohnny Chen2010-04-211-12/+25
* Better error-handling of getBitFieldInvMask() where msb < lsb (encoding error),Johnny Chen2010-04-201-6/+14
* Better error-handling for DisassembleThumb2DPModImm() with 2-reg operands whereJohnny Chen2010-04-201-1/+4
* Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operandJohnny Chen2010-04-191-3/+6
* Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.Johnny Chen2010-04-151-1/+1
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