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authorKevin Enderby <enderby@apple.com>2011-02-28 21:45:12 +0000
committerKevin Enderby <enderby@apple.com>2011-02-28 21:45:12 +0000
commit63b0d108a2dfad29e8096de30d4563c3c84040c1 (patch)
tree2dce947f7bb5bdbf89c4b834caf027f47d77c27b /llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
parent30a52dec93c32d3e6338538a6486f2ffe7609459 (diff)
downloadbcm5719-llvm-63b0d108a2dfad29e8096de30d4563c3c84040c1.tar.gz
bcm5719-llvm-63b0d108a2dfad29e8096de30d4563c3c84040c1.zip
Add missing whitespace in the formatting.
llvm-svn: 126687
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
index 074561c02d6..33889da77d6 100644
--- a/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
+++ b/llvm/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
@@ -1720,7 +1720,7 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
}
// Some instructions have predicate operands first before the immediate.
- if(Opcode == ARM::tBLXi_r9 || Opcode == ARM::tBLr9) {
+ if (Opcode == ARM::tBLXi_r9 || Opcode == ARM::tBLr9) {
// Handling the two predicate operands before the imm operand.
if (B->DoPredicateOperands(MI, Opcode, insn, NumOps))
NumOpsAdded += 2;
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